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SUMMARYThis article presents a differential fault analysis (DFA) technique using round addition for a generalized Feistel network (GFN) including CLEFIA and RC6. Here the term "round addition" means that the round operation executes twice using the same round key. The proposed DFA needs bypassing of an operation to count the number of rounds such as increment or decrement. To verify the feasibility of our proposal, we implement several operations, including increment and decrement, on a microcontroller and experimentally confirm the operation bypassing. The proposed round addition technique works effectively for the generalized Feistel network with a partial whitening operation after the last round. In the case of a 128-bit CLEFIA, we show a procedure to reconstruct the round keys or a secret key using one correct ciphertext and two faulty ciphertexts. Our DFA also works for DES and RC6.

Spatial variation in luminance, which is one of the most important attributes of a visual image, may cause characteristic reactions in higher order brain functions. We aim to characterize the event‐related potentials (ERPs) associated with a cognitive task (simple addition) in terms of how they are influenced by the spatial frequencies of the background visual pattern. We use vertically striped visual stimuli with embedded numbers (0–9) and different spatial frequency characteristics (white noise, 1/f, 1/f2, and 1/f3). The subjects are instructed to perform two tasks: an addition task that involved adding numbers presented as visual stimuli, and a reference task wherein the numbers were not added. In ERPs averaged over four types of visual stimuli for the addition task, positive components peaking at latencies of 182 ms in the central and frontal areas and 360 ms in the parietal area are observed, and significant differences are found between ERPs for the addition and reference tasks. In the addition task, the 182‐ms latency component shows a larger positive amplitude for 1/f3 compared with other stimuli in the right parietal‐occipital‐temporal area (P4, T6, O2), and the 360‐ms latency component tends to show a larger positive amplitude for 1/f compared with other stimuli in the parietal‐central area (C3, P3, Pz). We conclude that spatial frequency characteristics influence ERPs associated with the retrieval of arithmetic data and certain neural activities that accompany simple forms of addition. © 2013 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

Abstract:Recently, various studies of attack methods of round reduction differential fault analysis (DFA) using fault injection in block cipher-implemented microcontrollers have been reported. However, few studies have focused on the quantitative evaluation method of round reduction DFA vulnerability using detailed fault injection timing dependency of attack success rate. This is required to improve microcontroller security. Hence, we propose a quantitative evaluation method against round reduction DFA using a micro step DFA vulnerability chart and a vulnerability estimator (VE) that consists of pairs of fault injection timing and attack success rate.

SUMMARYWe present a round addition differential fault analysis (DFA) for some lightweight 80-bit block ciphers. It is shown that only one correct ciphertext and two faulty ciphertexts are required to reconstruct secret keys in 80-bit Piccolo and TWINE, and the reconstructions are easier than 128-bit CLEFIA. key words: differential fault analysis (DFA), round addition, block cipher, piccolo, TWINE