2013
DOI: 10.1002/pip.2434
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Development of an IEC test for crystalline silicon modules to qualify their resistance to system voltage stress

Abstract: IEC 62804 Ed. 1, System voltage durability qualification test for crystalline silicon modules, is being developed. First, two module designs are compared in chamber and in the natural environment of Florida (USA). From these results, a stress level of 60°C, 85% relative humidity, a bias of nameplate system voltage, 96 h dwell, and a pass/fail limit of 5% relative power degradation at 25°C and 1000 W/m 2 irradiance is initially proposed for the draft protocol. This paper next focuses on one of the main controve… Show more

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Cited by 54 publications
(41 citation statements)
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“…However, capability of good reproducibility within a given lab has previously been shown [10]. To further determine the effect of possible inadvertent variation in the stress levels applied by the laboratory to yield different outcomes of the test, the median degradation for each module type measured in the various laboratories was calculated and then added to the individual degradation data points.…”
Section: A Interlaboratory Test Resultsmentioning
confidence: 99%
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“…However, capability of good reproducibility within a given lab has previously been shown [10]. To further determine the effect of possible inadvertent variation in the stress levels applied by the laboratory to yield different outcomes of the test, the median degradation for each module type measured in the various laboratories was calculated and then added to the individual degradation data points.…”
Section: A Interlaboratory Test Resultsmentioning
confidence: 99%
“…In many instances, this mimics the behavior in the natural environment [12]. Alternately, foil placement on the module surface contacts the whole module face [10] and may be desired to approximate the situation of a very highly conductive soiling layer, or a continuous water layer pooling for extended periods of time on the whole module face that is connected to ground.…”
Section: Introductionmentioning
confidence: 99%
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“…The test proposed here has been examined in a round robin study [47] and validated in fielded modules. [48] Light exposure during application of the bias stress may be appropriate in order to more closely simulate the field conditions, but data on the degradation observed in this sort of test is not available. Metal foil may also be used to apply the voltage bias, but the basis for the pass criteria needs to be established, so this option is not included here, but will be included in the IEC test method.…”
Section: Potential-induced Degradation Testingmentioning
confidence: 99%