Development of an on-chip micro shielded-loop probe to evaluate performance of magnetic film to protect a cryptographic LSI from electromagnetic analysis

Yamaguchi, Masahiro; Toriduka, Hideki; Kobayashi, Shôichi; Sugawara, Takeshi; Hommaa, Naofumi; Satoh, Akashi; Aoki, Takafumi

doi:10.1109/isemc.2010.5711255

Cited by 17 publications

(6 citation statements)

References 7 publications

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“…This creates a danger in exposing the critical section of the code which can be exploited in different ways to gain advantage. For example, the memory bus can be probed to retrieve the secret keys if the adversary knows the exact position 254 of encryption; 3), At present, powerful magnetic probes are utilized to perform electro-magnetic side channel attacks [14], which are similar to power analysis. Such a probe can be placed on top of the original core, executing the cryptographic program, which will then result in a successful DPA.…”

Section: Rel Ated Workmentioning

confidence: 99%

CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study

Ambrose

Ignjatović

Parameswaran

2012

2012 IEEE International Symposium on Circuits and Systems

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Ahstract-Multiprocessor System-on-Chip (MPSoC) is an in tegral element in state-of-the-art embedded devices, ranging from low-end, mobile phones, PDAs, handheld medical devices up to high-end cars, avionics and robotics. Proper and safe functionality of such embedded systems is mandatory to avoid severe consequences, whereas security is absolutely necessary with "Cashless Wallets" forecasted to be the only means of financial transactions in the near future. Such a scenario places immense onus on the security experts where secure transactions using credit cards or mobile phones or any other embedded devices should not be revealing any footprint to the adversary. Side Channel Attacks (SCA) are considered as one of the most effective attacks on these embedded systems because of their effectiveness in realizing the secret information without physically disassembling the device. We propose an MPSoC architecture to prevent power analysis SCA where a dual-core algorithmic balancing is enforced by corrupting the balanced key and swapping the encryption rounds of a block-cipher at random places, random number of times. A case study using DES cryptography is performed. Our approach, CoRaS, alleviates performance by 0.1 % and area by 3.6% compared to the state-of-the-art MPSoC solution, however enhances security and practicality by eliminating its weaknesses.

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Section: Rel Ated Workmentioning

confidence: 99%

CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study

Ambrose

Ignjatović

Parameswaran

2012

2012 IEEE International Symposium on Circuits and Systems

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“…Power consumption is typically modelled by estimating the number of '1's in a register via a Hamming weight or Hamming distance power model. Several differing methods of statistically comparing the modelled versus measured power consumptions are commonly used, such as difference of means, distance of means and Pearson's correlation coefficient [26].…”

Section: Power Analysis Attacksmentioning

confidence: 99%

Security at the Edge

Gillan¹,

Karakonstantis²

2020

Cloud Computing Security - Concepts and Practice

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The Internet has become an essential part of daily life for almost everyone in society having grown far beyond its roots in the 1970s as the ARPANET, a network that was principally the domain of scientists and engineers. The popularity of the HTTP, developed at CERN in the late 1980s led to the widespread use of the term 'the web' as a generic name for the Internet for many years, at least in the public domain. Of course, the Internet is much more than just web browsing and, in recent years, the term cyberspace has become the most popular term to describe interactions over the Internet. Yet, an unambiguous definition of the term is difficult to formulate. Financial institutions underpinning the economy and the operation of national critical infrastructures, such as monitoring and control of the electricity supply, are now dependent on the Internet. A consequence of this is that cyberattacks become more costly for the victims and perversely more attractive to the criminals who carry them out. The advent of the Internet of Things (IoT) and edge computing as a new paradigm creates the potential for enhanced productivity but at the same time opens up new opportunities for cyberattacks while still being exposed to existing attach vectors such as the well-known denial of service attack (DDoS), which can take place in many forms. In this chapter, we described the challenges in building an edge system that is secure against cyberattack. We begin by briefly reviewing the architecture of communications over the Internet and later consider the new challenges that follow from operating the hardware with values of voltage, frequency and current that enable more energy efficiency.

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“…Specific countermeasures proposed against EM SCA include signal strength reduction techniques like shielding or signal information reduction using noise insertion [17]. However, data randomization with noise injection comes with significant power overheads, and EM shielding incurs high cost of packaging [22] and is not a practical solution for most applications. To the best of the authors' knowledge, none of these works have thoroughly investigated the root-cause of the EM leakage in a cryptographic IC.…”

Section: A Literature Review: Black Box Approachmentioning

confidence: 99%

STELLAR: A Generic EM Side-Channel Attack Protection through Ground-Up Root-cause Analysis

Das¹,

Nath²,

Chatterjee³

et al. 2019

EasyChair Preprints

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The threat of side-channels is becoming increasingly prominent for resource-constrained internet-connected devices. While numerous power side-channel countermeasures have been proposed, a promising approach to protect the non-invasive electromagnetic side-channel attacks has been relatively scarce. Today's availability of high-resolution electromagnetic (EM) probes mandates the need for a low-overhead solution to protect EM side-channel analysis (SCA) attacks. This work, for the first time, performs a white-box analysis to root-cause the origin of the EM leakage from an integrated circuit. System-level EM simulations with Intel 32 nm CMOS technology interconnect stack, as an example, reveals that the EM leakage from metals above layer 8 can be detected by an external non-invasive attacker with the commercially available state-of-the-art EM probes. Equipped with this 'white-box' understanding, this work proposes STELLAR: Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing, which is a two-stage solution to eliminate the critical signal radiation from the higher-level metal layers. Firstly, we propose routing of the entire cryptographic cores power traces using the local lower-level metal layers, whose leakage cannot be picked up by an external attacker. Then, the entire crypto IP is embedded within a Signature Attenuation Hardware (SAH) which in turn suppresses the critical encryption signature before it routes the current signature to the highly radiating top-level metal layers. System-level implementation of the STELLAR hardware with local lower-level metal routing in TSMC 65 nm CMOS technology, with an AES-128 encryption engine (as an example cryptographic block) operating at 40 MHz, shows that the system remains secure against EM SCA attack even after 1 M encryptions, with 67% energy-efficiency compared to the unprotected AES.

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Development of an on-chip micro shielded-loop probe to evaluate performance of magnetic film to protect a cryptographic LSI from electromagnetic analysis

Cited by 17 publications

References 7 publications

CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study

CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study

Security at the Edge

STELLAR: A Generic EM Side-Channel Attack Protection through Ground-Up Root-cause Analysis

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