Development on wafer level anisotropic conductive film for flip-chip interconnection

Souriau, Jean-Charles; Brun, J.J.; Franiatte, R.; Gasse, A.

doi:10.1109/ectc.2004.1319329

Cited by 17 publications

(8 citation statements)

References 4 publications

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“…All processing steps are performed at a wafer level resulting in reducing materials and processing cost. WLPs are suitable for further miniaturization and lower cost fabrication of electronic packages [1][2][3].…”

Section: Wafer-level Aca Technologymentioning

confidence: 99%

Recent advances in anisotropic conductive adhesives (ACAs) materials and processing technology

Paik

2010

2010 IEEE CPMT Symposium Japan

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This paper deals with three recent advances in the area of ACA materials and processing technologies, (1) wafer-level ACA, (2) ultrasonic ACA bonding, and (3) Solder ACAs.Patented idea of Wafer level package (WLP) ACA/NCA was introduced earlier as one of the promising ACA packaging technologies due to its advantages such as fewer processing steps, lower cost, and enhanced device performance compared to conventional single chip ACA packaging. WLP ACA can be widely used for flat panel display (FPD), general semiconductor packaging, and 3D-TSV applications because of cost and performance advantages.In addition, another patented novel anisotropic conductive film (ACF) bonding process using vertical ultrasonic vibration was also introduced in flex-on-board (FOB) and Touch Screen Panel(TSP) applications. The ACF temperature was precisely controlled by adjusting both U/S power and bonding pressure. The significant meaning of this technique are (1) significantly reduced ACF bonding time typically 1/3 ~ 1/5 of conventional T/C bonding times in FOB applications, (2) less thermal damages especially for TSP assembly, and (3) compact and energy saving machine.Lastly, newly developed solder ACFs combined with Ultrasonic processing can increase twice the current handling capability of conventional Ni ACFs and show excellent reliability performance in FOB applications because of metallurgical bonding at the joint rather than physical contact of conventional ACAs.

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Section: Wafer-level Aca Technologymentioning

confidence: 99%

Recent advances in anisotropic conductive adhesives (ACAs) materials and processing technology

Paik

2010

2010 IEEE CPMT Symposium Japan

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“…Even with the appealing feature, the technology is currently still unable to fully solve the reliability issue [5] due to its lack of structural compliance to adapt to the expansion of the NCA/NCF at elevated temperature. Other possible solutions include the use of high aspect-ratio metal posts or flakes instead of conductive particles [6], [7]. Unfortunately, there are also some technical limitations on these two technologies.…”

Section: Introductionmentioning

confidence: 98%

On the Thermal–Mechanical Behaviors of a Novel Nanowire-Based Anisotropic Conductive Film Technology

Cheng

Chen

Lin

et al. 2009

IEEE Trans. Adv. Packag.

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Extensive understanding and management of the thermal-mechanical characteristics of novel packaging designs during the bonding process are indispensable to the realization of the technologies. Thus, this paper attempts to explore the bonding process-induced thermal-mechanical behaviors of an advanced flip chip (FC) electronic packaging. FC packaging employs a novel anisotropic conductive film, which is a thin composite film composed of polymer matrix and thousands of millions of highly oriented, 1-D silver (Ag) nanowires on the scale of 200 nanometers in diameter. For carrying out the process simulation, a process-dependent finite element (FE) simulation methodology that integrates both thermal and nonlinear contact FE analyses and a special meshing scheme is applied. The material properties of the nanoscale Ag wires are first explored using molecular dynamics (MD) simulations. By the characterized material properties of the Ag nanowires, the effective material properties of the composite film are derived through two theoretical approaches: 1) the rule-of-mixture (ROM) technique and 2) the proposed FE method-based approach. The predicted results by these two approaches are extensively compared with each other to examine the feasibility of using the widely used ROM technique for such cases. In addition, the validity of the proposed process-dependent FE simulation methodology is also confirmed through three experiments: 1) micro-thermocouple measurement of temperature; 2) Twyman-Green Moiré Interferometry measurement of out-of-plane deformations; and 3) Portable Engineering Moiré Interferometry measurement of in-plane deformations. Throughout the investigation, the effectiveness of the novel interconnect technology is demonstrated. Good agreement with the experiments is also obtained. It is found that the technology may ensure good electrical performance and structural integrity, not only at room temperature but even at elevated temperature, based on its substantial contact stresses but minor peeling stresses on the bonding line, together with a moderate, process-induced warpage on the substrate.Index Terms-Anisotropic conductive film, finite-element (FE) modeling, flip-chip (FC) technology, Moiré interferometry measurement, molecular dynamics (MD) simulations, template assisted nanowire growth technique.

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“…To address such requirements and based on "smart layer" CEA-LETI patent, we have developed ultra low cost wafer level via filling and interconnection using conductive polymer. This technology presents many advantages compared to through silicon vias (TSV) and wafer level interconnections for deep vias (>300µm) as presented in [5], [6]. Fig.…”

Section: Introductionmentioning

confidence: 99%

Ultra low cost wafer level via filling and interconnection using conductive polymer

Saint-Patrice

Jacquet

Bridoux

et al. 2011

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

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Devices for consumers like camera phones are essentially driven by the cost and performances. In that scope, several new key technologies are requested to achieve a complete active waferlevel camera (with autofocus or zoom). A low cost vias interconnection has to be developed and conductive polymer is an attractive solution to overcome this challenge.In this paper we describe new technology to fill insulated vias and perform interconnection with conductive polymer with screen printing equipment.In the first part, process flow compatible with waferlevel camera integration is presented to make vias and metal routing. Then, polymer characterizations were done to evaluate Dupont CB100 resistivity and contact resistance with our metallization.Electrical contacts have been demonstrated with values about 100m and proflow configuration.Thermal cycling between -40°C to +85°C was performed successfully and no variation was observed even after 300 cycles. These results are very promising and give us a first feedback on this technology ability to withstand classical consumer product environmental tests.

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Development on wafer level anisotropic conductive film for flip-chip interconnection

Abstract: With the fast growth of multimedia, the packaging has to satisfy high interconnection density, high data throughput, miniaturization, easy thermal management and reliability need

Cited by 17 publications

References 4 publications

Recent advances in anisotropic conductive adhesives (ACAs) materials and processing technology

Recent advances in anisotropic conductive adhesives (ACAs) materials and processing technology

On the Thermal–Mechanical Behaviors of a Novel Nanowire-Based Anisotropic Conductive Film Technology

Ultra low cost wafer level via filling and interconnection using conductive polymer

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