Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications

Abstract

This paper proposed an X-band 6-bit passive phase shifter (PS) designed in 0.18 m silicon-on-insulator (SOI) CMOS technology, which solves the key problem of high integration degree, low power, and a small size T/R module. The switched-topology is employed to achieve broadband and flat phase shift. The ESD circuit and driver are also integrated in the PS. It covers the frequency band from 7.5 to 10.5 GHz with an EMS phase error less than 7.5 ı . The input and output VSWRs are less than 2 and the insertion loss (IL) is between 8-14 dB across the 7.5 to 10.5 GHz, with a maximum IL difference of 4 dB. The input 1 dB compression point (IP 1dB / is 20 dBm.