Device Driver and System Call Isolation in Embedded Devices

Malenko, Maja; Baunach, Marcel Carsten

doi:10.1109/dsd.2019.00049

Cited by 4 publications

(9 citation statements)

References 21 publications

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“…X280 uses the vector extension and SiFive Intelligence extensions, making the core suitable for highthroughput single-threaded and power-constrained applications [35]. Further, the work of [36] aims at providing system call isolation characteristics for embedded devices.…”

Section: Application Fieldsmentioning

confidence: 99%

A Survey of the RISC-V Architecture Software Support

et al. 2022

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RISC-V is a novel open instruction set architecture that supports multiple platforms while maintaining simplicity and reliability. Despite its novelty, the software support for RISC-V has been increasing in the last years, given that popular tool-chains and operating systems already have support for RISC-V. However, although many works have been exploring the RISC-V software ecosystem, no work that raised the current state of software support for RISC-V is available. In this context, this survey reviews the contributions introduced in the last years to understand the RISC-V's software ecosystem and its usage in both academic and industrial environments. We classified and evaluated the works into four main categories: fields of application, RISC-V implementations, software architecture, and deployment features. The primary goal of this research is to provide the community with a comprehensive overview of the current state of the art of RISC-V software support and identify and highlight the main contributions of recent works.

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Section: Application Fieldsmentioning

confidence: 99%

A Survey of the RISC-V Architecture Software Support

et al. 2022

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“…RISC-V Memory Protection. References: Malenko2019 [69], Kim2020 [54], Savry2020 [70], Song2015 [56], Menon2017 [59], Liu2018 [61], Ma2019 [57], Weiser2019 [71], Nienhuis2020 [72] process of design, development, testing, and debugging. This methodology can satisfy many areas of the computer industry, but they fundamentally leave a large number of exploitable vulnerabilities, leading to many serious system security problems [72].…”

Section: Memory Protectionmentioning

confidence: 99%

“…Effective memory protection can alleviate many system security vulnerabilities. As summarized in Figure 7, At least three types of memory protection solutions have been proposed: tagged memory [56,57,59,61,71,72], memory isolation [54,69], and memory encryption and authentication [70]. In this chapter, we discuss related research work on these topics.…”

Section: Memory Protectionmentioning

confidence: 99%

“…Also at the instruction level, Savry et al [70] proposed a framework to ensure control flow integrity by implementing a lightweight masking scheme applied to instructions, which is based on an authenticated memory encryption mechanism. At the system level, for memory isolation, Malenko et al [69] implemented a device driver isolation module in RTOS to prevent defective device drivers from destroying the state of the operating system and applications.…”

Section: Memory Isolation Encryption and Authenticationmentioning

confidence: 99%

“…European Processor Initiative (EPI), one of the cornerstones of the EuroHPC Joint Undertaking, a new European Union strategic entity focused on pooling the Union's and national resources on HPC to build and deploy the most powerful supercomputers within Europe, is preparing to adopt RISC-V as its core solution for exascale embedded HPC platform [9]. protection [54,56,57,59,61,[69][70][71][72], ISA security extensions [66,67,[73][74][75][76][77][78][79][80][81][82][83][84], cryptographic engines and primitives [78][79][80][81][82][83][85][86][87][88][89][90][91][92][93][94][95][96][97][98], and side-channel prevention [99][100][101]…”

Section: Introductionmentioning

confidence: 99%

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A Survey on RISC-V Security: Hardware and Architecture

2021

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The Internet of Things (IoT) is an ongoing technological revolution. Embedded processors are the processing engines of smart IoT devices. For decades, these processors were mainly based on the Arm instruction set architecture (ISA). In recent years, the free and open RISC-V ISA standard has attracted the attention of industry and academia and is becoming the mainstream. Many companies have already owned or are designing RISC-V processors. Many important operating systems and major tool chains have supported RISC-V. Data security and user privacy protection are common challenges faced by all IoT devices. In order to deal with foreseeable security threats, the RISC-V community is studying security solutions aimed at achieving a root of trust (RoT) and ensuring that sensitive information on RISC-V devices is not tampered with or leaked. Many RISC-V security research projects are underway, but the academic community has not yet conducted a comprehensive survey of RISC-V security solutions. The latest technology and future development direction of RICS-V security research are still unclear. In order to fill this research gap, this paper presents an in-depth survey on RISC-V security technologies. This paper summarizes the representative security mechanisms of RISC-V hardware and architecture. Specifically, we first briefly introduce the background and development status of RISC-V, and compare the RISC-V mechanisms with the most relevant Arm mechanisms, highlighting their similarities and differences. Then, we investigate the security research of RISC-V around the theme of hardware and architecture security. Our survey covers hardware and physical access security, hardware-assisted security units, ISA security extensions, memory protection, cryptographic primitives, and side-channel attack protection. Based on our survey, we predict the future research and development directions of RISC-V security. We hope that our research can inspire RISC-V researchers and developers.CCS Concepts: • Security and privacy → Embedded systems security; Cryptography.

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Optimized LRU Algorithm for STT-MRAM/SRAM Hybrid Cache Architecture

Wang

Zhao

2021

2021 7th International Conference on Computer and Communications (ICCC)

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Device Driver and System Call Isolation in Embedded Devices

Cited by 4 publications

References 21 publications

A Survey of the RISC-V Architecture Software Support

A Survey of the RISC-V Architecture Software Support

A Survey on RISC-V Security: Hardware and Architecture

Optimized LRU Algorithm for STT-MRAM/SRAM Hybrid Cache Architecture

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