Diagnosing multiple transition faults in the absence of timing information

Abstract

As timing requirements in today's advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such algorithms capable of diagnosing multiple delay faults. One method uses multiple transition fault models and the other reasons with ternary logic values, thus achieving modelindependent diagnosis. Experiments are conducted on IS-CAS'85 combinational and full-scan version of ISCAS'89 sequential circuits corrupted with multiple transition faults. The performance of both algorithms are evaluated and compared. The results show good efficiency and diagnostic resolution.

Operations on Multiple Transition Faults without Enumeration

“…The number of MTFs is much higher than the number of PDFs. Transition fault based approaches in [10]- [11] do not scale well to the complexity of this model.…”

Identification of delay defects on embedded paths using one current sensor

“…This is an important problem because a test vector may sensitize several PDFs that lead to the fault output(s). Using the set of measured suspect paths and/or the TF model, techniques as in [4] [5] [6] [7] [8] [11] among many others, address the problem of pruning the set of suspect defective locations. Some of them are designed for fault-diagnosis and others for post-silicon debug [1].…”