2017
DOI: 10.1103/physrevaccelbeams.20.093501
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Digital low level rf control system with four different intermediate frequencies for the International Linear Collider

Abstract: A field programmable gate array-based digital low level rf (LLRF) control system will be used in the International Linear Collider (ILC) in order to satisfy the rf stability requirements. The digital LLRF control system with four different intermediate frequencies has been developed to decrease the required number of analog-to-digital converters in this system. The proof of concept of this technique was demonstrated at the Superconducting RF Test Facility in the High Energy Accelerator Research Organization, J… Show more

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Cited by 3 publications
(7 citation statements)
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“…This equation works well for the fundamental mode (π mode), in which the detuning jΔωj is far less than 1 T s . However, in the case of the parasitic mode of a multicell cavity, in which the values of Δω 8π=9 and 1 T s are comparable, the difference equation in discrete-I described by (9) above may generate problems.…”
Section: A Cavity and Mechanical Modelmentioning
confidence: 99%
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“…This equation works well for the fundamental mode (π mode), in which the detuning jΔωj is far less than 1 T s . However, in the case of the parasitic mode of a multicell cavity, in which the values of Δω 8π=9 and 1 T s are comparable, the difference equation in discrete-I described by (9) above may generate problems.…”
Section: A Cavity and Mechanical Modelmentioning
confidence: 99%
“…The cavity differential equation in discrete form is given by (9) and 14, corresponding to discrete-I (for the fundamental mode) and discrete-II (for the parasitic mode), respectively. In the FPGA, ⃗ V c is then calculated by adding the outputs of the discrete-I and discrete-II cases.…”
Section: A Implementation Of Cavity Model In Fpgamentioning
confidence: 99%
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“…To reduce the number of boards, we developed a technique using multi IF [23]. With this technique, different IFs are combined by a passive combiner and fed to one ADC.…”
Section: Possible Digital Llrf Control System Configuration For Tmentioning
confidence: 99%
“…One of the concerns in this implementation is the availability of FPGA resources. The multi IF technique was applied in the digital board with four ADCs [23]. It was implemented in the Virtex 5 XC5VFX70T Xilinx FPGA.…”
Section: Possible Digital Llrf Control System Configuration For Tmentioning
confidence: 99%