2006
DOI: 10.1007/978-0-387-32864-5
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Digital Phase Lock Loops

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Cited by 56 publications
(27 citation statements)
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“…In this paper, a new digital circuit topology for synchronising a single-phase wind turbine generator with the grid is presented. The circuit which is based on the time delay digital tanlock loop (TDTL) [10,11] not only synchronises a WTG to the grid, but also re-establishes synchronization whenever it is lost such as after a sudden perturbation in the phase of the grid voltage. Essentially, the circuit consists of two TDTL loops as depicted in Fig.…”
Section: Introductionmentioning
confidence: 99%
“…In this paper, a new digital circuit topology for synchronising a single-phase wind turbine generator with the grid is presented. The circuit which is based on the time delay digital tanlock loop (TDTL) [10,11] not only synchronises a WTG to the grid, but also re-establishes synchronization whenever it is lost such as after a sudden perturbation in the phase of the grid voltage. Essentially, the circuit consists of two TDTL loops as depicted in Fig.…”
Section: Introductionmentioning
confidence: 99%
“…This mode of operation is an approach to circumvent the absence of an absolute reference clock in non-synchronized autonomous networks of oscillators. The main characteristic of SS-PLLs, as opposed to classical ones [4], is that their dynamics are governed by two linear equations (as opposed to only one in the classical case), depending on whether the local clock is lagging or leading. It is not possible to use the tools of linear analysis to determine whether an SS-PLL is stable (and, hence, synchronizes) or not.…”
Section: Introductionmentioning
confidence: 99%
“…, the PQLF approach can be used, because, by construction, the system can only stay for one time-step in 2 S (and in 4 S ). The matrix inequalities can be solved with Matlab.…”
mentioning
confidence: 99%
“…1 are realized with electronic logic circuits [14]. The phase detector in ADPLLs typically generates N -bit numbers representing the phase shift between the input and output signals.…”
Section: Designing a Boolean Phase Oscillatormentioning
confidence: 99%