Digital Pre-distortion Implemented Using FPGA

Byrne, Declan; Farrell, Ronan; Madhuwantha, Sidath; Leeser, Miriam; Dooley, John F.

doi:10.1109/fpl.2018.00086

Cited by 4 publications

(1 citation statement)

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“…The DPD linearisation is widely used in many applications, such as cellular telecommunications and satellite linking, because of its relatively simple implementation [51][52][53]. Here a DPD based on the least squares (LS) optimisation technique was used [54]. For simplicity the number of coefficients was minimised; the AM/AM behaviour of PA is plotted in Figure 18b.…”

Section: Experimental Validationmentioning

confidence: 99%

Performance Investigation of Peak Shrinking and Interpolating the PAPR Reduction Technique for LTE-Advance and 5G Signals

et al. 2019

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Orthogonal frequency division multiplexing (OFDM) has become an indispensable part of waveform generation in wideband digital communication since its first appearance in digital audio broadcasting (DAB) in Europe in 1980s, and it is indeed in use. As has been seen, the OFDM based waveforms work well with time division duplex operation in new radio (NR) systems in 5G systems, supporting delay-sensitive applications, high spectral efficiency, massive multiple input multiple output (MIMO) compatibility, and ever-larger bandwidth signals, which has demonstrated successful commercial implementation for 5G downlinks and uplinks up to 256-QAM modulation schemes. However, the OFDM waveforms suffer from high peak to average power ratio (PAPR), which is not desired by system designers as they want RF power amplifiers (PAs) to operate with high efficiency. Although NR offers some options for maintaining the efficiency and spectral demand, such as cyclic prefix based (CP-OFDM), and discrete Fourier transform spread based (DFT-S-OFDM) schemes, which have limiting effects on PAPR, the PAPR is still as high as 13 dB. This value increases when the bandwidth is increased. Moreover, in LTE-Advance and 5G systems, in order to increase the bandwidth, and data-rate, carrier aggregation technology is used which increases the PAPR the same way that bandwidth increment does; therefore, it is essential to employ PAPR reduction in signal processing stage before passing the signal to PA. In this paper, we investigate the performance of an innovative peak shrinking and interpolation (PSI) technique for reducing peak to average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) based signals at waveform generation stage. The main idea behind the PSI technique is to extract high peaks, scale them down, and interpolate them back into the signal. It is shown that PSI technique is a possible candidate for reducing PAPR without compromising on computational complexity, compatible for existing and future telecommunication systems such as 4G, 5G, and beyond. In this paper, the PSI technique is tested with variety of signals in terms of inverse fast Fourier transform (IFFT) length, type of the signal modulation, and applications. Additional work has been carried out to compare the proposed technique with other promising PAPR reduction techniques. This paper further validates the PSI technique through experimental measurement with a power amplifier (PA) test bench and achieves an adjacent channel power ratio (ACPR) of less than -55 dBc. Results showed improvement in output power of PA versus given input power, and furthermore, the error vector magnitude (EVM) of less than 1% was achieved when comparing of the signal after and before modification by the PSI technique.

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Section: Experimental Validationmentioning

confidence: 99%

Performance Investigation of Peak Shrinking and Interpolating the PAPR Reduction Technique for LTE-Advance and 5G Signals

et al. 2019

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Software-Defined Radio Transceiver Design Using FPGA-Based System-on-Chip Embedded Platform With Adaptive Digital Predistortion

Kumar

Rawat

2020

IEEE Access

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In this paper, a software-defined radio (SDR) based transceiver system is designed and implemented on the system-on-chip (SoC) platform, which consists of a high-speed Arm embedded processor and a reconfigurable field-programmable gate array (FPGA). In the proposed SDR transceiver, the real-time baseband signal generation and adaptive digital predistortion (ADPD) units are implemented on the SoC platform. Memory polynomial model based ADPD solution is implemented to linearize the radio frequency (RF) power amplifiers (PAs). The implementation of the ADPD on a reconfigurable FPGA platform makes the system flexible and cost-effective. The PA characterization, in terms of model extraction and coefficient calculation, is done in real-time. These calculated coefficients are updated in the transmission path to precondition the transmitted signal before it is applied to the PA. The proposed ADPD is applied at the baseband level. Therefore, it can be used for different classes of PA operating at different RF carrier frequencies. A long-term evolution (LTE) signal with 20 MHz bandwidth and 11 dB peak to average power ratio (PAPR) is used for simulation and measurement purposes. The LTE signal is amplified using a GaN-based harmonically tuned continuous Class-F PA in measurement. The performance of the implemented ADPD scheme is analyzed in terms of NMSE, ACPR and EVM. INDEX TERMS Digital predistortion, field-programmable gate array, linearization, memory polynomial, software-defined radios, system-on-chip, transceiver. I. INTRODUCTION As technology is growing, advanced wireless communication devices have become an essential part of the everyone's daily life. These communication devices require high-speed access for voice, video, data and other such applications [1]-[3]. The commercial wireless communication standards are upgraded from 2 nd generation (2G) to 5 th generation (5G) and each generation uses different network protocols and different communication standards [3]. Therefore, all communication devices need to be updated whenever a new generation of wireless communication standard is introduced [3]. Modifying communication devices for different communication standards is a critical and costly affair. Therefore, the demand for a flexible, reconfigurable and programmable communication system that can be easily modified without any hardware cost has been increasing significantly. Software-defined radio (SDR) is a favorable solution to solve such problems. SDR is a rapidly developing technology in the telecommunication industry to develop a flexible and reconfigurable transceiver architecture. SDRs can upgrade their functionality without replacing the hardware on which they are implemented [4] [5]. This feature supports SDR to develop a multifunctionality transceiver device that is suitable for any type of communication standard. Such SDR based programmable communication devices can handle the existing as well as the newly developed wireless communication standards and network protocols. In SDRs, baseband signal proces...

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MP-DPD: Low-Complexity Mixed-Precision Neural Networks for Energy-Efficient Digital Predistortion of Wideband Power Amplifiers

Wu,

Li,

Beikmirza

et al. 2024

IEEE Microw. Wireless Tech. Lett.

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Digital Pre-distortion Implemented Using FPGA

Cited by 4 publications

References 1 publication

Performance Investigation of Peak Shrinking and Interpolating the PAPR Reduction Technique for LTE-Advance and 5G Signals

Performance Investigation of Peak Shrinking and Interpolating the PAPR Reduction Technique for LTE-Advance and 5G Signals

Software-Defined Radio Transceiver Design Using FPGA-Based System-on-Chip Embedded Platform With Adaptive Digital Predistortion

MP-DPD: Low-Complexity Mixed-Precision Neural Networks for Energy-Efficient Digital Predistortion of Wideband Power Amplifiers

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