using Cu [11] or Ni [12] as metal catalysts could be a preferred strategy for largescale production of uniform graphene with large domain size. However, it usually requires an additional transfer process for fabricating graphene onto substrates, which is tedious and may affect the physical properties of graphene. [13] On the other hand, dielectric materials are of crucial importance in FETs because improved capacitance could be achieved by using gate dielectric layer for sufficient resistance (reduced gate leakage). [14,15] High-k dielectrics such as Al 2 O 3 , [16,17] HfO 2 , [18,19] and ZrO 2 [20,21] have been extensively used for the graphene-based FETs with nanometer regime, and emerged as potential alternate gate insulators replacing low-k SiO 2 in electronic devices. Therefore, for FETs, direct fabrication of graphene materials on top of high-k dielectrics, such as ZrO 2 , without further transferring process will be of great importance.Previously, we fabricated graphene scaffold−ZrO 2 nanofilms in situ on the SiO 2 substrates by spin coating and thermal annealing of a Zr-based metal-organic oligomer (Figure 1a). [22] The obtained nanofilm possesses heterostructure with ultrathin carbon layer formed on top of the ZrO 2 layer. The carbon layer shows a low sheet resistance of 17 kΩ per square, corresponding to 3197 S m −1 in electrical conductivity. In this study, we further investigated the detailed structural and electric characteristics of the obtained graphene scaffold−ZrO 2 nanofilms. Small angle X-ray reflectivity (XRR) confirms the heterostructure of the nanofilm, and a typical nanofilm is composed of ≈3.5 nm of carbon on top of ≈21.4 nm ZrO 2 layer. The resulting nanofilm on Si substrate shows a dielectric constant of ≈15.7, which is comparable to other high-k materials such as Y 2 O 3 (≈15). The developed in situ strategy could be further utilized to build multilayer heterostructural films, such as graphene-ZrO 2 / Al 2 O 3 nanofilms on Si substrate, providing potential opportunities in building multilayer devices with various substrates. Further fabricating it into ionic liquid-gated electric double layer transistors (EDLTs) demonstrated the p-type channel characteristic of the graphene scaffold, with a current on-off ratio (I on /I off ) of ≈2.1. With these desired structural and electric characteristics, we successfully integrated the graphene scaffold− ZrO 2 nanofilm into FETs with lateral architecture by applying either shadow masks or photolithography during electrode deposition, and these p-type FETs show notable I on /I off ratio.