Direct metal etch of ruthenium for advanced interconnect

Abstract

In this work, Ru wires patterning by direct etch are evaluated for a potential 5 nm technology node. The characteristics of Ru etching by varying the bias voltage, total flow rate and Cl2/(O2+Cl2) gas flow ratio are studied in an inductively couple plasma etching chamber. Ru sidewalls profile with a tapering angle of 90° and Ru to SiO2 hard mask etch selectivity of 6 are achieved. The authors show the feasibility of patterning lines with an aspect ratio up to 3.5 and lines with a critical dimension down to 10.5 nm (with a 3σ line width roughness of 4.2 nm), which paves the way to further scaling of this approach. Finally, the authors present a study on Ru line roughness after patterning on 300 mm wafers. Here, they compare line roughness results of wafers where Ru is deposited with different deposition techniques, such as atomic layer deposition and plasma vapor deposition, and it is annealed after deposition at various temperatures.

Nanoscale Ruthenium-Containing Deposits from Ru(CO)4I2via Simultaneous Focused Electron Beam-Induced Deposition and Etching in Ultrahigh Vacuum: Mask Repair in Extreme Ultraviolet Lithography and Beyond

“…[26][27] However, the majority of deposits achieved via FEBID of organometallic precursors require concurrent or post-deposition purification steps. One particularly interesting class of precursors are Ru-based organometallic compounds, which gain more and more importance regarding the manufacturing of electronic chips, 28 building of interconnect wires, 29 and most importantly for the repair of EUVL masks. [30][31][32] There are a few studies addressing Ru-based FEBID processes, which report rather low metal contents of the corresponding deposits in the absence of purification steps.…”

State of the Art and Future Perspectives in Advanced CMOS Technology

“…Currently, the damascene implementation of ruthenium lines is hampered by the availability of optimized CMP. A semi-damascene integration approach is a proposed solution for multilevel Ru interconnect [ 266 , 267 ]. Danny Wan et al reported that Ru films were patterned using EUV single exposure and a subtractive etching step to generate lines with CD down to 10.5 nm.…”

“…With the successful suppression of the grain-boundary scattering effect, a reduction in total wire resistivity of more than 30% was achieved. The result suggests by that enlarging the grain sizes of Ru and combining it with a subtractive patterning process [ 266 , 267 ], the physical limitation of nano-grain structures in damascene Ru can be solved.…”

Ruthenium-Assisted Chemical Etching of Silicon: Enabling CMOS-Compatible 3D Semiconductor Device Nanofabrication

“…Ruthenium (Ru) is already used in semiconductor fabs as a barrier metal for interconnects. , Ru is listed in international roadmap for devices and systems (IRDS) as the next for future-generation metal interconnects in logic devices and as a metal electrode for DRAM capacitors. − Thus, there is a semiconductor ecosystem already in place for ruthenium thin-film deposition, patterning and etch of sub-20nm Ru features with high yield and low defectivity. Our research in ruthenium-based MacEtch aims to leverage this existing Ru ecosystem in the semiconductor industry.…”