“…Therefore, in order to understand RTS in future nano-scaled CMOS devices, identification of the gate insulator interface traps, i.e., the number and carrier capture/emission properties of traps, will be essential. Although some studies on the emission property have been reported so far (40,41) from MOSFETs containing only a few traps (42). Figure 16 shows (a) the CP current of MOSFETs containing four interface traps and (b) the number of interface traps for many individual small MOSFETs (42).…”