Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS

Hashimoto, Takashi; Nonaka, Youichi; Tominari, T.; Fujiwara, Haruhiko; Tokunaga, Kenichi; Arai, Masatsugu; Wada, S.; Udo, Tsutomu; Seto, Motoshi; Miura, Makoto; Shimamoto, H.; Washio, Katsuyoshi; Tomioka, Hiroto

doi:10.1109/iedm.2003.1269182

Cited by 22 publications

(9 citation statements)

References 7 publications

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“…However, the final RTA needs to be performed quickly at high temperature to prevent excess phosphorus diffusion from the highly doped emitter poly-Si electrode. The cobalt self-aligned silicidation and metallization process steps are carried out, and the electrodes of a SiGe HBT with a high f T of 200 GHz are connected by metallization [22].…”

Section: A Optimize Order Of Thermal Processing Stepsmentioning

confidence: 99%

“…To avoid this second problem, the SiGe HBT formation module was inserted after patterning of the MOS gate and before S/D implantation, starting with the 0.18 μm generation, as shown in Fig. 3 [19], [20], [22].…”

Section: Low Thermal Budget Process For Forming Hbtsmentioning

confidence: 99%

“…An intrinsic base region is selectively formed at an open emitter hole using a conventional single-wafer LP-CVD technique [19], [20], [22]. An H2 bake is used to eliminate surface contamination (C, O, etc.)…”

Section: Low Thermal Budget Process For Forming Hbtsmentioning

confidence: 99%

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A Flexible 0.18 $\mu{\rm m}$ BiCMOS Technology Suitable for Various Applications

Hashimoto

Nonaka

Tominari

et al. 2013

IEEE J. Electron Devices Soc.

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Hitachi's SiGe BiCMOS technology, which integrates 0.18 μm CMOS and a SiGe heterojunction bipolar transistor (HBT), does not degrade MOS or bipolar performance. The BiCMOS process is divided into blocks, and the ordering of their processing is optimized so that they do not interfere with each other. Low-thermal-budget SiGe HBT formation is achieved using a minimal-moisture-desorption oxide layer, thereby avoiding disturbing the CMOS process. This technology, which can also be applied to the 0.13 μm generation, has been used for applications ranging from high-speed ones like automotive radar and 40 Gbps optical communication to consumer ones like wireless.

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Section: A Optimize Order Of Thermal Processing Stepsmentioning

confidence: 99%

Section: Low Thermal Budget Process For Forming Hbtsmentioning

confidence: 99%

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A Flexible 0.18 $\mu{\rm m}$ BiCMOS Technology Suitable for Various Applications

Hashimoto

Nonaka

Tominari

et al. 2013

IEEE J. Electron Devices Soc.

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“…In fact, these two technologies are complementary. Bipolar Complementary Metal-Oxide Semiconductor (BiCMOS) technology uses both types of transistors to take their advantages to build more complex and convenient circuits [1,2]. Although there are many innovations in the design and fabrication of new transistor structures such as carbon nanotube field effect transistors (CNTFET) [2,3] and QCA structures [4].…”

Section: Introductionmentioning

confidence: 99%

Design and Simulation of a Novel Hetero-junction Bipolar Transistor with Gate-Controlled Current Gain

Mehrabani

Fattah

Rahimi

2023

IJE

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A new structure for SiGe Hetero-junction Bipolar transistor (HBT) is designed and simulated using Silvaco simulator. The considered extra terminal gives the ability to control the transistor's current gain. By applying voltage to the gate terminal, the base effective width would be controlled. Decrement of the Base width yields to the carrier recombination rate reduction, let the emitted electrons to have higher chance to reach the collector. Considering extra terminal have two approaches. One is to improve the current gain of the transistor by applying a constant voltage to the gate and the other is to modify the characteristics of the transistor in such a way that the current gain became optimized. The current gain of the transistor without any gate voltage is about 50V, which increases to 750 for high and 50,000 for low collector currents with the gate voltage variation consideration. In addition, our final proposed gatecontrolled HBT with a large gate over the base and collector has the breakdown voltage of 8V and the cut-off frequency of about 11 GHz. The maximum FoM of 1200 is achieved using the proposed structure.

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“…However, for radio frequency (RF) applications, BJT is still superior to MOSFET for its well-behaved characteristics. Thus, many BJT based novel devices such as SiGe HBT, SiGe BiCMOS [1][2][3], and SOI lateral BJT [8][9][10] have been developed. Nevertheless, these devices suffer also the drawback of complicated fabrication processes, and thus resulting in a high preparing cost.…”

Section: Introductionmentioning

confidence: 99%

A high current gain gate-controlled lateral bipolar junction transistor with 90nm CMOS technology for future RF SoC applications

Chen

Fang

Yeh

et al. 2008

Solid-State Electronics

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Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS

Cited by 22 publications

References 7 publications

A Flexible 0.18 $\mu{\rm m}$ BiCMOS Technology Suitable for Various Applications

A Flexible 0.18 $\mu{\rm m}$ BiCMOS Technology Suitable for Various Applications

Design and Simulation of a Novel Hetero-junction Bipolar Transistor with Gate-Controlled Current Gain

A high current gain gate-controlled lateral bipolar junction transistor with 90nm CMOS technology for future RF SoC applications

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