Dose loss of phosphorus due to interface segregation in silicon-on-insulator substrates

Abstract

The dose loss of phosphorus due to interface segregation in silicon-on-insulator (SOI) substrates was characterized by using sheet resistance. Bulk silicon and SOI wafers were implanted with phosphorus at a dose of 5×1014 cm−2, followed by annealing at 900 °C to produce phosphorus segregation at the SiO2–Si interface. The effectiveness of the mobility model for calculating sheet resistance and the reliability of parameters in interface segregation models were verified based on the sheet resistance data and the secondary ion mass spectrometry profiles of phosphorus in bulk silicon samples. The sheet resistance in SOI substrates was then simulated using the verified mobility model and interface segregation parameters. Simulation results indicate that the equilibrium segregation behavior at the interfaces in SOI samples is similar to that in bulk silicon samples. Moreover, the dose loss in SOI substrates is more significant than that in bulk silicon wafers owing to a larger interface area in the SOI substrates.

Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin Channel

“…However, the fitted parameter of channel doping is 10 18 cm −3 , lower than expected value of 10 19 cm −3 . We speculate that this might be dose loss of channel doping because of interface segregation between channel and gate oxide [12], [13].…”

A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires

“…One possible explanation for this observation is the segregation of phosphorous atoms to the oxide interface from the poly-Si NW. 9,18) A reduction in the concentration of phosphorous in the Si material may also explain the increase in the effective carrier mobility of the NW sample as compared with the Hall mobility.…”