Double GaAs/Si Heterojunction Layers in Si Solar Cells Fabricated by Electron Beam Evaporation

Influence of anti-reflection coatings on double GaAs/Si heterojunction layers in Si solar cells

“…In this work, PC1D software is used to optimize the c-Si solar cell with double heterojunction GaAs/Si layers. The initial simulation results of the solar cell show efficiency of 13.84%, which matches the efficiency of manufactured cells [10]. The thickness and doping concentration of different layers are optimized without using ARCs.…”

“…Initially, for the c-Si wafer bulk, a recombination carrier lifetime (τ n = τ p = 2.4 µs) [10] and a thickness of 180 µm are used. For the GaAs layer bulk, a recombination carrier lifetime (τ n = τ p = 4.4 µs) [10] and front and back surface recombination velocity (S n = S p = 7 × 10 4 cm s −1 ) are used [33]. Fixed values of series and shunt resistance are taken from the published work in real/fabricated solar cells.…”

“…Fixed values of series and shunt resistance are taken from the published work in real/fabricated solar cells. Series resistance of 0.003495 Ω and shunt resistance of 1.4879 Ω are used for simulation [10]. The other parameters used in the simulation are listed in table 1.…”

“…It provides active GaAs/Si heterojunctions with efficient carrier transport through the thin SiO 2 layer [9]. Investigation of a Si solar cell with a double GaAs heterojunction, which is fabricated using electron beam evaporation, shows efficiency of 13.77% [10].…”

Design and simulation analysis of narrow bandgap single-junction GaAs-GaAsSb nanowire solar cell

“…Homogeneous p-n or p-i-n junctions encounter trap recombination and reduced conductivity due to intrinsic doping. Additionally, surface defects lead to front surface recombination 9 .To address these challenges, researchers have explored heterostructure designs 4,[13][14][15] . Notable examples include p-i-n GaAs-InGaP-GaAs core-shell NWSCs 16 and p-i-n AlGaAs-GaAs heterostructure NWSCs 17 .…”