Double-RESURF 700 V n-channel LDMOS with best-in-class on-resistance

Hossain, Z.; Imam, Mohamed A.; Fulton, J.A.; Tanaka, Masayasu

doi:10.1109/ispsd.2002.1016190

Cited by 32 publications

(14 citation statements)

References 2 publications

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“…One configuration of a double-RESURF structure is illustrated in Fig. 7.14 [13,14]. The noticeable change from the single RESURF case is the addition of the P top region.…”

Section: Reduced Surface Field Resurfmentioning

confidence: 99%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

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“…One configuration of a double-RESURF structure is illustrated in Fig. 7.14 [13,14]. The noticeable change from the single RESURF case is the addition of the P top region.…”

Section: Reduced Surface Field Resurfmentioning

confidence: 99%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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“…R ECENTLY, 700-V LDMOS device has been widely used for AC-DC power supply [1]- [9]. To achieve low specific on-resistance (R on,sp ) and high breakdown voltage (BV), much work has been reported, such as double reduced surface field (RESURF) LDMOS [1], [2], triple RESURF LDMOS [3]- [6], multiple RESURF LDMOS [7], lateral floating-capacitorcoupled (LFCC) LDMOS [8], and super junction (SJ) LDMOS [9], etc.…”

Section: Introductionmentioning

confidence: 99%

“…To achieve low specific on-resistance (R on,sp ) and high breakdown voltage (BV), much work has been reported, such as double reduced surface field (RESURF) LDMOS [1], [2], triple RESURF LDMOS [3]- [6], multiple RESURF LDMOS [7], lateral floating-capacitorcoupled (LFCC) LDMOS [8], and super junction (SJ) LDMOS [9], etc. Multiple RESURF LDMOS contains vertical structures which have multiple horizontal p-type pillars but without additional n-type pillars.…”

Section: Introductionmentioning

confidence: 99%

A 700- V Junction-Isolated Triple RESURF LDMOS With N-Type Top Layer

Qiao

Zhou

et al. 2014

IEEE Electron Device Lett.

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A junction-isolated triple RESURF (JITR) LDMOS with high breakdown voltage (BV) and low specific on-resistance (R on,sp ) is proposed in this letter. Compared with the conventional triple RESURF (CTR) LDMOS, the new structure features a highly doped n-type top (N-top) layer at the surface of N-well, providing a low on-resistance surface conduction path in the on-state. The experimental result demonstrates that low R on,sp and high BV of above 730 V are achieved by the JITR LDMOS. R on,sp of the JITR LDMOS is about 15%-24.3% lower than that of the CTR LDMOS. The JITR LDMOS with horizontal N-top layer and P-buried layer resembles a super junction (SJ) LDMOS. Compared with the reported SJ LDMOS, the SJ layer of JITR LDMOS is formed in the longitudinal direction instead of the width direction, and the proposed JITR LDMOS exhibits almost the highest BV and high power figure of merit (FOM, defined as BV 2 /R on,sp ) in comparison to the published SJ LDMOS. Index Terms-Junction-isolated triple RESURF (JITR) LDMOS, n-type top (N-top) layer, breakdown voltage (BV), specific on-resistance (R on,sp ).

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“…The silicon-on-insulator (SOI) power lateral doublediffused metal-oxide semiconductor (LDMOS) has been widely used in smart power integrated circuits (ICs) owing to its inherent advantages of high reliability, low power loss, and superior isolation. [1][2][3] Reduced surface field (RESURF) technology has been widely used to improve the trade-off between the R on,sp and breakdown voltage (BV ). [4][5][6] The channel resistance (R ch ) plays an important role in the on-resistance of medium-and low-voltage metal-oxide semiconductor fieldeffect transistors (MOSFETs).…”

Section: Introductionmentioning

confidence: 99%