2007
DOI: 10.1109/mwscas.2007.4488810
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Dual diode-Vth reduced power gating structure for better leakage reduction

Abstract: Leakage has become one of the most dominant factors of power management and signal integrity of nanometer scale integrated circuits. Recently, power gating structures has proven to be effective in controlling leakage. In this paper an alternative dual diode-Vth reduced power gating structure is proposed for better reduction of leakage currents, especially for low-power, high-performance portable devices. The proposed technique maintains an intermediate power saving state as well as the conventional power cut-o… Show more

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Cited by 7 publications
(3 citation statements)
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“…Many power gating approaches [13][14][15][16] have been proposed for data retention with an intermediate power saving mode (drowsy mode) wherein a significant voltage difference is maintained across the circuit blocks by boosting the virtual ground voltage. Clamping devices like diodes and transistors are used for raising the virtual ground voltage.…”
Section: Power Gating Techiquesmentioning
confidence: 99%
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“…Many power gating approaches [13][14][15][16] have been proposed for data retention with an intermediate power saving mode (drowsy mode) wherein a significant voltage difference is maintained across the circuit blocks by boosting the virtual ground voltage. Clamping devices like diodes and transistors are used for raising the virtual ground voltage.…”
Section: Power Gating Techiquesmentioning
confidence: 99%
“…This approach is not emphatically used to dynamically change the output voltage but instead only used to maintain an already calculated output voltage. Dual diode Vth approach [14] utilizes diodes in parallel with sleep transistors for the data retention. Sleep mode is lost in this technique and hence it is not suitable when the circuit remains idle for long periods.…”
Section: Power Gating Techiquesmentioning
confidence: 99%
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