2008
DOI: 10.1109/ted.2007.910564
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Dual Material Double-Layer Gate Stack SON MOSFET: A Novel Architecture for Enhanced Analog Performance—Part I: Impact of Gate Metal Workfunction Engineering

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Cited by 43 publications
(5 citation statements)
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“…Modification of the electric field distribution under the gate region can improve the electron velocity profile and hence the device transconductance. One approach to improve the device transconductance and suppress DIBL of the lateral HEMTs is to employ a dual metal gate (DMG) structure with different metal work functions (WF) [9][10][11]. Simulations of GaN-based HEMT devices using this structure have been performed previously [12,13] showing notable improvements in the electron velocity under the gate leading to a higher output current and transconductance as well as suppression in the DIBL in these devices [14].…”
Section: Introductionmentioning
confidence: 99%
“…Modification of the electric field distribution under the gate region can improve the electron velocity profile and hence the device transconductance. One approach to improve the device transconductance and suppress DIBL of the lateral HEMTs is to employ a dual metal gate (DMG) structure with different metal work functions (WF) [9][10][11]. Simulations of GaN-based HEMT devices using this structure have been performed previously [12,13] showing notable improvements in the electron velocity under the gate leading to a higher output current and transconductance as well as suppression in the DIBL in these devices [14].…”
Section: Introductionmentioning
confidence: 99%
“…This nonuniform distribution of the drift velocity of electron across the channel results significantly high drain conductance and high channel length modulation in short channel MOSFET devices. Although the Double Gate structure provides an effective mean of suppressing the short channel effects but it does not provide any significant improvement in electron transport efficiency over conventional single gate MOSFET structure [2]- [4]. This work presents a novel Dual Insulator architecture which can be provided as a possible solution to improve the poor electron transport efficiency of DG MOSFET device.…”
Section: Introductionmentioning
confidence: 99%
“…It is observed that the novel DMG device has marginally better SS compared with classical DMG DGJLT due to the improved subthreshold characteristics. However, the SMG devices have slightly lower SS than DMG devices [28,29].…”
Section: Resultsmentioning
confidence: 90%