2014
DOI: 10.1007/978-3-642-54924-3_19
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Dynamic, Tagless Cache Coherence Architecture in Chip Multiprocessor

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Cited by 2 publications
(2 citation statements)
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“…Edge caching caches network content to routers close to users' edge networks, which reduces the delay of video search. When the next request is received, the network can respond to users' needs in time, improve the efficiency of users' content acquisition, and increase the transmission speed of network content [11].…”
Section: G Network Content Cachingmentioning
confidence: 99%
“…Edge caching caches network content to routers close to users' edge networks, which reduces the delay of video search. When the next request is received, the network can respond to users' needs in time, improve the efficiency of users' content acquisition, and increase the transmission speed of network content [11].…”
Section: G Network Content Cachingmentioning
confidence: 99%
“…The proposed solution is to allow a fine-grained hybrid interaction between write-through and write-back policies to improve the overall performance. However, it is become more complex to generalize an inclusive state diagram to manage diverse coherence protocols possessed by each core when the number of the cores is increased [17]. [14] develops and evaluates two consistent write-back caching policies, ordered and journaled, that are designed to perform increasingly better than write-through and traditional write-back policies.…”
Section: Related Workmentioning
confidence: 99%