Dynamic voltage and frequency scaling framework for low-power embedded GPUs

You, Daecheol; Chung, Ki-Seok

doi:10.1049/el.2012.2624

Cited by 17 publications

(7 citation statements)

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“…To implement the QoS-aware and the on-demand DVFS policies, the GPU DVFS framework proposed in [3] was used. The clock management unit of the target SoC platform offers a five-level clock frequency mechanism for the Mali-400MP.…”

Section: System Setupmentioning

confidence: 99%

Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs

You

Chung

2015

IEEE Comput. Arch. Lett.

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Dynamic voltage and frequency scaling (DVFS) is a key technique for reducing processor power consumption in mobile devices. In recent years, mobile system-on-chips (SoCs) has supported DVFS for embedded graphics processing units (GPUs) as the processing power of embedded GPUs has been increasing steadlily. The major challenge of applying DVFS to a processing unit is to meet the quality of service (QoS) requirement while achieving a reasonable power reduction. In the case of GPUs, the QoS requirement can be specified as the frame-per-second (FPS) which the target GPU should achieve. The proposed DVFS technique ensures a consistent GPU performance by scaling the operating clock frequency in a way that it maintains a uniform FPS.

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Section: System Setupmentioning

confidence: 99%

Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs

You

Chung

2015

IEEE Comput. Arch. Lett.

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“…Li and Martinez [2006] proposed a low-overhead heuristics DVFS algorithm to obtain optimal power savings. Similar studies of DVFS to improve energy efficiency also have been applied for GPUs [Mei et al 2013;Ge et al 2013;You and Chung 2012]. Mei et al [2013] performed a measurement study to explore the efficiency of GPU DVFS on system energy consumption.…”

Section: Related Workmentioning

confidence: 99%

Static and Dynamic Frequency Scaling on Multicore CPUs

Bao

Hong

Chunduri

et al. 2016

ACM Trans. Archit. Code Optim.

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Dynamic Voltage and Frequency Scaling (DVFS) typically adapts CPU power consumption by modifying a processor's operating frequency (and the associated voltage). Typical DVFS approaches include using default strategies such as running at the lowest or the highest frequency or reacting to the CPU's runtime load to reduce or increase frequency based on the CPU usage. In this article, we argue that a compile-time approach to CPU frequency selection is achievable for affine program regions and can significantly outperform runtimebased approaches. We first propose a lightweight runtime approach that can exploit the properties of the power profile specific to a processor, outperforming classical Linux governors such as powersave or on-demand for computational kernels. We then demonstrate that, for affine kernels in the application, a purely compiletime approach to CPU frequency and core count selection is achievable, providing significant additional benefits over the runtime approach. Our framework relies on a one-time profiling of the target CPU, along with a compile-time categorization of loop-based code segments in the application. These are combined to determine at compile-time the frequency and the number of cores to use to execute each affine region to optimize energy or energy-delay product. Extensive evaluation on 60 benchmarks and 5 multi-core CPUs show that our approach systematically outperforms the powersave Linux governor while also improving overall performance.

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“…In order to reduce power consumption of embedded GPUs, software-based DVFS framework was presented by You and Chung [18]. In this work, an on-demand DVFS policy module was implemented that incorporate a work queue mechanism.…”

Section: Literature Reviewmentioning

confidence: 99%

“…Both above mentioned techniques acquire their own importance in minimizing power utilization of computing devices for series and parallel nature of workload. Because of this fact, recent research is focusing on algorithms incorporating the DVFS and CG techniques to bring down power consumption of computing units for such workload, where full capacity of the computing unit, in terms of performance, is not required [18], [32], [33]. DVFS has a significant impact on performance, utilization and power consumption of CPU-GPU based architectures and it is a widely used technique for power optimization in computer architectures [34]- [36].…”

Section: Introductionmentioning

confidence: 99%

Run-Time Resource Management Controller for Power Efficiency of GP-GPU Architecture

Najam

Ahmed

Masood³

et al. 2019

IEEE Access

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The demand for high-performance computing (HPC) has been increasing since the invention of computing technology. This led to the invocation of sophisticated multi/many-core processors with high performance. Graphical processing units (GPUs) have emerged as an important innovation in the manycore era as it features a high number of processors. The GPU acts as a computational accelerator that can significantly reduce the computational time of the HPC, as it can offer standout parallelism for high-end computing applications such as graphics designing. However, increasing the resources has resulted in higher power consumption and heat dissipation which has been a challenging problem for modern HPC Units. On the other hand, because of the dynamic nature of workload, a large amount of parallelism, offered by these many-core processors, is often underutilized. An ideal system would be smart enough to efficiently utilize resources and save power where less workload is available. Reducing the resources dynamically has direct implications on the performance of the system. However, if less workload is available, reducing the resources would not harm the performance, rather it would save power with less to no trade-off in overall throughput of the system. In this paper, a smart power and performance efficient resource management controller for general purpose-GPU architecture is presented. The proposed controller, based on a feedback mechanism, keeps on analyzing the current frequency of central processing unit (CPU) and GPU, number of active cores of the CPU and utilization of CPU and GPU. On the basis of collected data, the proposed controller which features fuzzy type-2 as an optimizing mechanism tries to create a balance between performance and power consumption. The results are evaluated against various benchmarks on NVIDIA TK1 GPU kit and by using dynamic voltage and frequency scaling and core gating, up to 47 % reduction in power consumption has been achieved.

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Dynamic voltage and frequency scaling framework for low-power embedded GPUs

Cited by 17 publications

References 0 publications

Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs

Quality of Service-Aware Dynamic Voltage and Frequency Scaling for Embedded GPUs

Static and Dynamic Frequency Scaling on Multicore CPUs

Run-Time Resource Management Controller for Power Efficiency of GP-GPU Architecture

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