DYSCO: DYnamic Stepper Current InjectOr to improve write performance in STT-RAM memories

Seyedfaraji, Saeed; Hajisadeghi, Amir M.; Talafy, Javad; Zarandi, Hamid R.

doi:10.1016/j.micpro.2019.102963

Cited by 7 publications

(1 citation statement)

References 15 publications

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“…However, both of these solutions incur unnecessary power overhead in the circuit. There are different state-of-the-art techniques [16]- [21] addressing the write operation of STT-RAM across different levels of system abstractions, i.e., at device, circuit, architecture, and the application level. However, the currently proposed methods ignored the importance of reliability caused by radiation-induced soft errors.…”

Section: Introductionmentioning

confidence: 99%

EXTENT: Enabling Approximation-Oriented Energy Efficient STT-RAM Write Circuit

et al. 2022

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Spin Transfer Torque Random Access Memory (STT-RAM) has garnered interest due to its various characteristics such as non-volatility, low leakage power, high density. Its magnetic properties have a vital role in STT switching operations through thermal effectiveness. A key challenge for STT-RAM in industrial adaption is the high write energy and latency. In this paper, we overcome this challenge by exploiting the stochastic switching of STT-RAM cells and, in tandem, with circuit-level approximation. We enforce the robustness of our technique by analyzing the vulnerability of write operation against radiation-induced soft errors and applying a low-cost improvement. Due to serious reliability challenges in nanometer-scale technology, the robustness of the proposed circuit is also analyzed in the presence of CMOS and magnetic tunnel junction (MTJ) process variation. Compared to the state-of-the-art, we achieve 33.04% and 5.47% lower STT-RAM write energy and latency, respectively, with a 3.7% area overhead, for memory-centric applications.

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Section: Introductionmentioning

confidence: 99%