Effect of barrier process on electromigration reliability of Cu/porous low-k interconnects

Abstract

Electromigration ͑EM͒ reliability of Cu/low-k interconnects with a conventional preclean-first process, and an advanced barrier-first process has been investigated. Compared with the preclean-first process, extrinsic early failures were not observed for the barrier-first process. This suggests that process-induced defects, which are the most probable cause for early failures, are significantly reduced for the barrier-first process. Transmission electron microscopy observation demonstrated a more uniform and thicker Ta barrier for the barrier-first process than the preclean-first process. This led to a higher ͑jL͒ c product, and prolonged the EM lifetime accordingly. In addition, a predeposited Ta barrier during the barrier-first process protected the mechanically weak low-k dielectrics from plasma etch damage, and a uniform via profile resulted. In contrast, the via opening at the top was found to be larger than that of at the via bottom for the preclean process. The uniform via profile is another advantage of the barrier-first process from the point of view of process control.

Effect of Post-Annealing on Reliability of Cu/Low-k Interconnects

“…For both electron flow directions, capping an SiCNH layer increased the lifetimes of the Cu interconnects embedded in dense SiCOH films; those embedded in porous SiCOH films behaved similarly. Surface migration has been reported as a dominant EM failure mechanism for Cu interconnects, 30,31 and could be also responsible for the finding of this study. Capping an SiCNH layer on the top surface of a Cu wire is equivalent to transferring the weak interface of Cu/SiCOH to a strong one of Cu/ SiCNH, thus slowing down the surface migration due to an enhancement of adhesion for the interface of Cu/SiCNH.…”

Effects of post-annealing and temperature/humidity treatments on the interfacial adhesion energy of the Cu/SiNx interface for Cu interconnects

“…It is well known that the poor interfacial adhesion energy at the Cu=capping layer interface could be the key reason for the EM reliability degradation. [12][13][14] There have been several reports on the effects of Cu surface treatments and oxidation environments on the interfacial adhesion at the Cu and capping layer interface. [8][9][10][11][12][13][14][15] Previous studies on the interfacial adhesion between Cu and a SiN x capping layer after CMP, focusing on surface treatments with various plasma gases and wet chemical solutions, showed that the surface treatments can remove contaminants and residual oxygen at the Cu surface after CMP and thereby improve the interfacial adhesion energy.…”

Effects of Cu Metal Barrier on Electrical Characteristics of Porous Carbon-Doped Oxide Film

“…This increase is becoming larger with the advance of technological node because the metal barrier would occupy a larger fraction of the metal line. 13 Traditionally, Ta/TaN bilayer is widely used as a metal barrier. In additional to an increased line-resistance, this barrier exhibits reduced barrier capacity and poor step-coverage, in the scaled trench as technological nodes advances to 32 nm or below.…”