2013
DOI: 10.1149/2.025309jss
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Effect of Electrons Trapping/De-Trapping at Si-SiO2Interface on Two-State Current in MOS(p) Structure with Ultra-Thin SiO2by Anodization

Abstract: The phenomenon of two-state inversion gate current of metal-oxide-semiconductor device with p-type substrate (Al/SiO2/p-Si structure using an anodized SiO2 layer) at VG>0 was investigated. Different amounts of electrons are trapped/de-trapped at Si-SiO2 interface after exerting different set/reset stressing voltages over different set/reset time. And the electron trapping/de-trapping at the Si-SiO2 interface near the conduction band is thus proposed to rationalize the decreased/revertible gate current (Iset /I… Show more

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Cited by 7 publications
(4 citation statements)
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“…Figure 4(a) also shows that there is an uptick in the release of energy at the 𝑆𝑖𝑂 2 /𝑆𝑖 interface. The formation of defects at such interface introduces electron trap states [68][69][70] , which can contribute to enhance the p-type doping of the 𝑃𝑑𝑆𝑒 2 channel.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…Figure 4(a) also shows that there is an uptick in the release of energy at the 𝑆𝑖𝑂 2 /𝑆𝑖 interface. The formation of defects at such interface introduces electron trap states [68][69][70] , which can contribute to enhance the p-type doping of the 𝑃𝑑𝑆𝑒 2 channel.…”
Section: Resultsmentioning
confidence: 99%
“…Figure 4(a) also shows that there is an uptick in the release of energy at the SiO 2 /Si interface. The formation of defects at such interface introduces electron trap states [72][73][74], which can contribute to enhance the p-type doping of the PdSe 2 channel. The pile-up of negative charge at the SiO 2 /Si during prolonged irradiation exposures acts as an extra negatively-biased gate and right-shift V gs,MIN thus increasing the hole-doping of the channel.…”
Section: Resultsmentioning
confidence: 99%
“…Different numbers of trapped electrons are detected after applying various NCVS treatments. 30 Figure 7 shows the 1 MHz fresh C-V curve and the C-V curves after the NCVS treatments with −1 V, −1.5 V, and −2 V for 700 s under the dark condition. Similar to Fig.…”
Section: Resultsmentioning
confidence: 99%
“…17 The phenomenon of DD was dominated by edge fringing field effect in planar MOS devices and the photo-sensitivity is strongly related to the elongated edge perimeter. 18,19 It was also reported that the most excess electrons are generated in the conduction band of silicon by photon excitation. The depletion width at the edge of planar MOS device will shrink immediately so that the capacitance increases accordingly.…”
mentioning
confidence: 99%