2019
DOI: 10.1016/j.mee.2019.111006
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Effect of interfacial InZnO conducting layer on electrical performance and bias stress stability of InAlZnO thin-film transistors

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Cited by 12 publications
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“…Additionally, immediately within 0.1 s after a positive voltage pulse was applied to the gate (+30 V amplitude for 10 s), the number of carriers abruptly increased, converting the channel layer into a metallic state, as illustrated in the right panel of Figure 2a. For transistors based on oxides containing In, the switching behavior could not be accomplished because I D was maintained at a high constant value (i.e., a metallic state) owing to the high carrier density that originated from excessive defects, regardless of the magnitude of the gate voltage [27,28]. In such cases, it was impossible to convert the channel layer from the metallic state to the semiconducting state by external stimuli such as voltage and light pulses.…”
Section: Characteristics Of Mst Devicesmentioning
confidence: 99%
“…Additionally, immediately within 0.1 s after a positive voltage pulse was applied to the gate (+30 V amplitude for 10 s), the number of carriers abruptly increased, converting the channel layer into a metallic state, as illustrated in the right panel of Figure 2a. For transistors based on oxides containing In, the switching behavior could not be accomplished because I D was maintained at a high constant value (i.e., a metallic state) owing to the high carrier density that originated from excessive defects, regardless of the magnitude of the gate voltage [27,28]. In such cases, it was impossible to convert the channel layer from the metallic state to the semiconducting state by external stimuli such as voltage and light pulses.…”
Section: Characteristics Of Mst Devicesmentioning
confidence: 99%