Effect of Mole fraction and Fin Material on Performance Parameter of 14 nm Heterojunction Si1-xGex FinFET and Application as an Inverter

Verma, Shekhar; Tripathi, Suman Lata

doi:10.1007/s12633-021-01592-5

Cited by 20 publications

(10 citation statements)

References 28 publications

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“…The attained values verify that the inverter designed using a 40 nm ditch in the OSC of a single gate bottom contact OTFT which has a superfluous doping concentration near the electrodes, generates superior performance and therefore, may be employed in organic circuits aiming towards boosted performance as indicated in figure 10 [31]. A comprehensive comparison of the noise margins for different configurations used to design the inverter has been done in table 10.…”

Section: Inverter Design Using Single Gate Ditch Otft With Extra P + ...mentioning

confidence: 67%

“…Though TFTs are an obvious and simple choice for designing inverters, there may be other ways for doing the same. Since the recent times, flexible electronics is witnessing the use of vertical organic field effect transistors (VOFET) [29], FinFET [30], [31] and GAAFET [32]. The three architectures against the OTFT are as compared below: Though, OTFTs are not yet performing well enough for commercial usage because of lack of performance pertaining to operation speed, parasitic device capacitance, fabrication complexity on flexible substrates, deviceto-device variations, and bias stability.…”

Section: Organic Invertermentioning

confidence: 99%

“…Analyzing the single gate device employing Atlas 2-D numerical device simulator [31] using the mobility genre proposed by Poole-Frenkel to essentially examine the stationary and active performance of the electronic circuits. Using the model, mobility may be articulated as:…”

Section: 4mentioning

confidence: 99%

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Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

Gupta,

Mittal,

Juneja

2023

Phys. Scr.

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This paper demonstrates the static and dynamic characteristics of all-p organic inverter employing a bottom gate bottom contact organic thin film transistor with a ditch incorporated into the OSC and additional p+ doping done to its S/D nearing area. Various configurations of OTFT have been experimented with and it is found that as compared to an OTFT without extra p+ doping, the devices having additional doping show better responses. Where, for SG OTFT, ID is derived to be 18 μs, yet the one with extra doping illustrates a swooping 16.67% increased output current of 21 μs. To enhance the performance of the device further, a ditch of 30 nm, embedded 10 nm into the OSC is incorporated, further augmenting the performance of the device by 55.5% as compared to the conventional BGBC. Besides, the proposed inverter presents a considerably elevated performance in terms of robustness and low and high noise margins. This paper further compares the inverter using Diode Load Logic and Zero Vgs Load Logic topologies, wherein it was found that DLL shows an exceptional 211% less propagation delay τ p of 27 μs, as compared to 84 μs delay experienced by ZVLL. But comparing the two topologies in terms of the static response, ZVLL are way better and preferred over the counterparts since ZVLL configuration displays 20.5% augmented Noise Margin, improved gain, and overall robustness. Owing to the performance parameters achieved, such organic inverters may be incorporated into integrated circuits rendering trustworthiness to digital operations in electronic circuits and numerous cascading applications. Since the organic inverters made using the proposed OTFT exhibit a decent gain hence have an apparent prospective of driving myriad-stage logic like ring oscillators and memory blocks. Moreover, these may be employed in the areas of biosensors and wearable electronics as well wherever.

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Section: Inverter Design Using Single Gate Ditch Otft With Extra P + ...mentioning

confidence: 67%

Section: Organic Invertermentioning

confidence: 99%

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Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

Gupta,

Mittal,

Juneja

2023

Phys. Scr.

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“…For design of CMOS inverter, n-FinFET and p-FinFET are connected in series and p-FinFET as load. The supply voltage (V DD ) is connected to source of p-FinFET and drain terminal both FinFET are shorted together to form output like conventional CMOS inverter [33,34]. The MGW-FinFET based inverter circuit schematic is shown in figure 5.…”

Section: Cmos Inverter Performance Analysismentioning

confidence: 99%

Improved post-radiation behavior of FinFET based CMOS with workfunction modulated gate

Ray,

Naugarhiya,

Mishra

2024

Phys. Scr.

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The total ionizing dose (TID) effect of modulated gate workfunction (MGW) FinFET based CMOS inverter is designed and analyzed. The post radiation analysis of the voltage transfer characteristics, noise margin and propagation delay are demonstrated. The incorporation workfunction modulation engineering enhances the OFF-state performance, and maintains positive threshold voltage for both the pre and post radiation condition. 2-decade improvement is noticed for the both n-FinFET and p-FinFET. In addition the proposed technique offers minimum propagation delay time and acceptable noise margin range even after 2000 krad of radiation dose. The analysis and comparison of the results is done by the 3-D TCAD simulator.

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“…4,7,8 These difficulties are solved technically by using high dielectric (high-k) materials as gate oxide. 9 The prime cause for preferring high dielectric substances for ultrascale MOSFETs is their independent relationship with the capacitance. These materials generate higher band-gap and dielectric constant.…”

mentioning

confidence: 99%

Improvement in the Performance of III-V Channel Based Ultra-Thin Junction-Less-Hybrid CMOS Circuits with Mixed Mode Analysis

Rout

Dutta

Maity

2022

ECS J. Solid State Sci. Technol.

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The logic performance of a hybrid complementary-metal-oxide-semiconductor (CMOS) circuit based on a novel technology known as a junction-less transistor constructed with high-K and III-V compound material junction-less-double-gate MOSFET (JL-DG-MOSFET) for ultra-low power applications is analyzed. The CMOS circuit is constructed by using a Ge-based P-MOS and GaAs based N-MOS to analyze different performance metrics of inverter such as noise margin, voltage transfer characteristics, transient response, gain, frequency response, and propagation delay using mixed mode analysis. The aforementioned characteristics of the proposed inverter are analyzed and compared with an Si-based CMOS inverter and we observed that the proposed structure shows an improved circuit performance over Si-based CMOS circuit. Consequently, the work is also extended to the design and performances of universal logic gates. The aforementioned N-MOS structure has a higher drive current of 1.3 mA, gm of 5.9 mS, gd of 20.8 mS, SS of 64 mV/Decade, and DIBL of 23mV/V, whereas the Ge based P-MOS structure yields drive current of 0.7 mA, gm of 1.5 mS, gd of 5.6 mS, SS of 95 mV/Decade, and DIBL of 21mV/V. The hybrid C-MOS structure has a higher unity-gain bandwidth of 1100GHz and lower propagation delay of 3.1ps

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Effect of Mole fraction and Fin Material on Performance Parameter of 14 nm Heterojunction Si1-xGex FinFET and Application as an Inverter

Cited by 20 publications

References 28 publications

Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

Improved post-radiation behavior of FinFET based CMOS with workfunction modulated gate

Improvement in the Performance of III-V Channel Based Ultra-Thin Junction-Less-Hybrid CMOS Circuits with Mixed Mode Analysis

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