Effect of Nitridation on 1/f Noise in n-MOSFETs with High-k Dielectric

Srinivasan, P.; Simoen, Eddy; Rittersma, Chris; Pantisano, L.; Claeys, Cor; Misra, D.

doi:10.1149/1.2209315

Cited by 4 publications

(4 citation statements)

References 12 publications

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“…Compared to the ITRS specification value of 200 V 2 /Hz for analog CMOS applications, at least a one-decade higher noise is observed in these high-k devices. 28 As an alternative figure of merit parameter, Hooge's constant ␣ H is calculated as NfS id /I d 2 , 29 with N the total number of carriers in the channel, which is calculated from…”

Section: G326mentioning

confidence: 99%

Low-Frequency (1∕f) Noise Performance of n- and p-MOSFETs with Poly-Si∕Hf-Based Gate Dielectrics

Srinivasan

Simoen

Pantisano

et al. 2006

J. Electrochem. Soc.

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The low-frequency ͑LF͒ noise performance of n-and p-channel metal-oxide-semiconductor field-effect transistors ͑MOSFETs͒ with different Hf-based gate oxides, deposited by metallorganic chemical vapor deposition ͑MOCVD͒ on the same interfacial oxide layer and using polysilicon ͑poly-Si͒ as a gate material has been investigated. Independent of the gate oxide, the LF noise spectra of n-and p-MOSFETs are predominantly of the 1/f ␥ type, with the frequency exponent ␥ close to 1. For nMOSFETs, the noise spectral density of HfO 2 devices is two orders of magnitude higher than for SiON or Hf x Si 1−x ON ͑silicates͒, where 0 Ͻ x Ͻ 100%, most likely due to trapping by defects in the high-k layer. For the silicates with different x, no significant differences are noticed for n-and p-MOSFETs. It is shown that the noise characteristics behave as can be expected for a number fluctuations mechanism. The extracted volume and surface trap densities are significantly higher for pure HfO 2 than for the Hf x Si 1−x ON devices. In the latter case, trap densities comparable with the values for the SiON reference transistors are obtained. Hooge's parameter ␣ H , as an alternative figure of merit, shows that the devices with MOCVD HfO 2 gate dielectric have the noisiest performance, while Hf x Si 1−x ON MOSFETs yield the lowest ␣ H , even better than for SiON.

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Section: G326mentioning

confidence: 99%

Low-Frequency (1∕f) Noise Performance of n- and p-MOSFETs with Poly-Si∕Hf-Based Gate Dielectrics

Srinivasan

Simoen

Pantisano

et al. 2006

J. Electrochem. Soc.

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“…There are no noise data reported for these devices. However, some recent experiments by the authors [11] indicate that a nitridation of the interface (Decoupled Plasma Nitridation step -DPN with 7-9% N 2 at the interface) before a MOCVD HfO 2 deposition leads to a one order of magnitude increase in noise performance, as illustrated in Fig. 3a.…”

Section: A the Sio 2 Interfacial Layermentioning

confidence: 95%

“…The typical elements that could possibly impact the low-frequency noise performance are 1) the Si/SiO 2 interfacial layer (IL) interface, 2) the properties of the interfacial layers (thickness, composition, quality), 3) the IL/high-κ interface, 4) properties of the high-κ layers (thickness, κ-value, defect density, deposition technique), 5) the high-κ/gate electrode interface, 6) the gate electrode properties like thickness and composition (poly-Si, FUSI, metal). The pre-and/or post deposition anneal steps also strongly impacts the noise performance [11]. In addition, the noise performance is also influenced by the substrate strain engineering implemented in the processing [12], as indicated by (7) in Fig.…”

Section: Introductionmentioning

confidence: 99%

High-k Gate Stack Engineering and Low Frequency Noise Performance

Luna-Sánchez

González-Martínez

2006

ECS Trans.

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Gate stack engineering for advanced deep submicron CMOS technology nodes has been extensively studied during the last decade, so that high-κ dielectrics in combination with metal gate or FUSI electrodes are implemented in several research lines. Much effort has been concentrated on the optimization of gate stacks from a viewpoint of dielectric properties and reliability issues. Less information is available on the low frequency noise performance of these gate stacks, which is an essential parameter for both analog and mixed signal applications. This review demonstrates the necessity of gate stack engineering for achieving a low 1/f noise performance. The impact of several processing parameters, such as the thickness of the interfacial layer and the high-κ oxide, bulk properties of the high-κ layer, post deposition anneal (PDA) treatments, choice of gate electrode material (poly-silicon, fully silicided or metal) will be addressed in order to point out the role of the different interfaces and bulk layers of the gate stack. Such a systematic study will form the basis for noise modeling as for these gate-dielectrics the standard noise models are no longer applicable. Finally, the impact on the noise behavior of strain engineering in the silicon substrate to boost up the carrier mobility is briefly discussed.

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“…To overcome this issue, several types of microchip-based systems(microdisk, micropillar, micro bottle, and photonic crystal cavities) [14] have been engineered and successfully utilized for implementing cavity-QED type of experiments [19][20][21][22][23][24][25] by coupling them with trapped cold atoms, quantum dots. Numerical and theoretical methods have also been developed to understand the optical properties of these systems [15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Tunable quantum switch realized with a single Λ -level atom coupled to the microtoroidal cavity

et al. 2019

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We propose a realization of the quantum transistor for coherent light fields for the fibre-coupled microdisk cavities. We demonstrate by combining numerical and analytical methods that both in strong coupling and bad cavity limits it is possible to change system's behaviour from being fully transparent to being fully reflective by varying the amplitude of the external control field. We remark that tuning the amplitude of the control field is significantly easier in the experimental setting than tuning cavity-atom coupling strength which was suggested in ref.[1] for two-level atoms and works only in the strong coupling limit. We also demonstrate the possibility of controlling the statistics of the input coherent field with the control field which opens the venue for obtaining quantum states of light.

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Effect of Nitridation on 1/f Noise in n-MOSFETs with High-k Dielectric

Cited by 4 publications

References 12 publications

Low-Frequency (1∕f) Noise Performance of n- and p-MOSFETs with Poly-Si∕Hf-Based Gate Dielectrics

Low-Frequency (1∕f) Noise Performance of n- and p-MOSFETs with Poly-Si∕Hf-Based Gate Dielectrics

High-k Gate Stack Engineering and Low Frequency Noise Performance

Tunable quantum switch realized with a single Λ -level atom coupled to the microtoroidal cavity

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