2011
DOI: 10.1063/1.3656001
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Effect of post deposition anneal on the characteristics of HfO2/InP metal-oxide-semiconductor capacitors

Abstract: Articles you may be interested inEffect of atomic layer deposition growth temperature on the interfacial characteristics of HfO2/p-GaAs metaloxide-semiconductor capacitors Electrical and chemical characteristics of Al2O3/InP metal-oxide-semiconductor capacitors Appl. Phys. Lett. 102, 132903 (2013); 10.1063/1.4799660 Al2O3/InAs metal-oxide-semiconductor capacitors on (100) and (111)B substrates Appl. Phys. Lett. 100, 132905 (2012); 10.1063/1.3698094 The influences of surface treatment and gas annealing conditio… Show more

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Cited by 55 publications
(43 citation statements)
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“…The border trap model is common for traditional III-V MOS system using GaAs, InP, and InGaAs. [35][36][37][38] In those cases, remarkable frequency dispersion at accumulation bias in the experimental C-V curves is the most characteristic feature for the border trap model. [35][36][37][38] Border traps have long time constants as they interact with the conduction band electrons via tunneling, leading to large frequency dispersion even at accumulation bias.…”
Section: à10mentioning
confidence: 99%
“…The border trap model is common for traditional III-V MOS system using GaAs, InP, and InGaAs. [35][36][37][38] In those cases, remarkable frequency dispersion at accumulation bias in the experimental C-V curves is the most characteristic feature for the border trap model. [35][36][37][38] Border traps have long time constants as they interact with the conduction band electrons via tunneling, leading to large frequency dispersion even at accumulation bias.…”
Section: à10mentioning
confidence: 99%
“…4 It is well known that the density of interface states (D it ) of III-V semiconductors are strongly correlated to the native oxides, 5 and In-P-oxides have been correlated to D it for high-k/InP system. 6 Therefore, it is desirable to decrease the native oxide concentration on the InP surface in order to improve electrical performance. 7 One of the advantages of high-k dielectrics grown by atomic layer deposition (ALD) on III-V substrates is the "self cleaning" effect, 7 in which the native oxides are converted by the first pulse of metal precursor during ALD.…”
mentioning
confidence: 99%
“…3,4 The interface quality of high-k/InP influences the electrical performance, such as the sub-threshold swing. 5 A recent report has correlated the indium and phosphorus oxides at the interface with a significant density of interface states (D it ), 6 which have the potential to degrade the electrical performance. In situ studies of the interfacial chemistry of atomic layer deposition (ALD) of Al 2 O 3 and HfO 2 on InP have been reported.…”
mentioning
confidence: 99%
“…The presence of interfacial P-oxides have been correlated with an increased interface trap density in the high-k/InP system. 6,30 Therefore, an improved cleaning and passivation process prior to ALD is required to avoid P-oxide formation during the ALD process and obtain a high quality high-k/ GaP interface. Figure 3 shows the Al 2p and S 2s spectra for the S-passivated samples, after annealing in the ALD reactor, and after each precursor exposure during the initial ALD stages.…”
mentioning
confidence: 99%