Effect of process variations and ambient temperature on electron mobility at the SiO/sub 2//4H-SiC interface

Lu, Chao‐Yang; Cooper, James A.; Tsuji, Takashi; Chung, Gil Yong; Williams, John R.; McDonald, K.; Feldman, L. C.

doi:10.1109/ted.2003.814974

Cited by 143 publications

(44 citation statements)

References 9 publications

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“…As a matter of fact, recently Chang et al 44 argued that even the composition and crystallographic orientation of the SiC surface layer can influence the amount of nitrogen incorporated during the nitridation process of a gate oxide. Furthermore, Saitoh et al 45 recently evaluated the density of interface states in MOS capacitors fabricated on 4H-SiC surfaces with different cut angles, demonstrating a decrease of the D it values close to conduction band edge from 5 Â 10 12 cm À2 eV À1 to 3 Â 10 11 cm À2 eV À1 moving from vicinal (8 -off) surfaces to 90 -off surfaces, corresponding to the (11)(12)(13)(14)(15)(16)(17)(18)(19)(20) face.…”

Section: (A) and 5(b)mentioning

confidence: 99%

“…8,9 To reduce the interface states density and alleviate the mobility problem, different post-oxidation-annealings (POA) of the gate oxide in NO or N 2 O have been explored 10,11 and can be efficient to provide adequate mobility values in the range of 30-50 cm 2 V À1 s À1 . [12][13][14][15][16] Even higher values (up to 150 cm 2 V À1 s À1 ) were achieved employing annealings in alumina furnaces or in POCl 3 , but the reliability of these gate oxides represents still a serious concern. 17, 18 An additional issue in vertical 4H-SiC MOSFETs is that the source and body regions are typically formed by a selective doping obtained by ion-implantation.…”

Section: Introductionmentioning

confidence: 99%

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Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Fiorenza

Giannazzo

Frazzetto

et al. 2012

Journal of Applied Physics

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The influence of the surface morphology on the channel mobility of 4H-SiC metal-oxide-semiconductor field effect transistors annealed under two different conditions is discussed. The devices were fabricated using post-implantation annealing at 1650 °C. In particular, while the use of a protective capping layer during post-implantation annealing preserved a smooth 4H-SiC surface resulting in a channel mobility of 24 cm2 V−1 s−1, a rougher morphology of the channel region (with the presence of surface macrosteps) was observed in the devices annealed without protection, which in turn exhibited a higher mobility (40 cm2 V−1 s−1). An electrical analysis of SiO2/SiC capacitors demonstrated a reduction of the interface state density from 7.2 × 1011 to 3.6 × 1011 cm−2 eV−1, which is consistent with the observed increase of the mobility. However, high resolution transmission electron microscopy showed an almost atomically perfect SiO2/4H-SiC interface. The electrical results were discussed considering the peculiar surface morphology of the annealed 4H-SiC surfaces, i.e., attributing the overall reduction of the interface state density to the appearance of macrosteps exposing non-basal planes.

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Section: (A) and 5(b)mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Fiorenza

Giannazzo

Frazzetto

et al. 2012

Journal of Applied Physics

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“…Nitridation is the most common process to improve the mobility, taking reliability and stability into consideration. [4][5][6][7][8][9] Although the interface state density (D IT ) evaluated by the conventional high-low method is significantly reduced by nitridation processes, the improvement in mobility is not sufficient. Therefore, it is important to reveal mobility-limiting factors at the nitrided SiO 2 /SiC interface.…”

mentioning

confidence: 99%

Characterization of very fast states in the vicinity of the conduction band edge at the SiO2/SiC interface by low temperature conductance measurements

Yoshioka

Nakamura

Kimoto

2014

Journal of Applied Physics

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We have investigated the unique interface states (NI) generated by NO annealing at the SiO2/SiC interfaces by low-temperature conductance measurements, which is more suitable for characterization of very fast interface states than high-frequency conductance measurements at room temperature. Although only a part of the NI states can be evaluated by measurements at room temperature, the whole picture of the NI states, especially near the conduction band edge (0.07 eV ≤ EC−ET), has been revealed by the low temperature measurements. The NI peak was present at the interface even without NO annealing. The NI density increased with NO annealing temperature. The NI density at the energy levels shallower than 0.2 eV exceeded 1012 cm−2eV−1 after NO annealing. The capture cross section of the NI states is uniquely larger than that of conventional interface states.

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“…But a key challenge for SiC MOSFET technology has been the quest for a high channel mobility. Using a conventional thermal oxidation approach, mobilities less than 10 cm 2 /V.s are typically obtained [9,10]. This is about two orders of magnitude below the bulk mobility of 4H-SiC, the polytype most commonly investigated for power electronics applications [11].…”

Section: Introduction He Mosfet (Metal Oxide Semiconductor Field Ementioning

confidence: 99%

Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO₂/Al₂O₃Gate-Stack

Urresti

Arith

Olsen

et al. 2019

IEEE Trans. Electron Devices

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High performance 4H-SiC MOSFETs have been fabricated, having a peak effective mobility of 265 cm 2 /V.s, and a peak field effect mobility of 154 cm 2 /V.s, in 2 µm gate length MOSFETs. The gate stack was designed to minimise interface states and comprised a 0.7 nm thermally grown SiO2 on 4H-SiC, followed by Al2O3 and a metal gate contact. In this way carbon remaining following SiC oxidation is significantly reduced. A density of interface traps in the range 6×10 11-5×10 10 cm-2 eV-1 is also obtained. Temperature dependent electrical data reveals that the high mobility results from conduction being phonon-limited rather than Coulomb-limited. Furthermore, universal mobility in these 4H-SiC MOSFETs is shown to be up to 50% of that observed in Si devices. Expressions for electric field dependent contributions to mobility are presented. A steep sub-threshold slope of 127 mV/dec indicates low electrical defect density. A temperature coefficient of-4.6 mV/K in threshold voltage is similar to that in Si MOSFETs.

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Effect of process variations and ambient temperature on electron mobility at the SiO/sub 2//4H-SiC interface

Cited by 143 publications

References 9 publications

Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Characterization of very fast states in the vicinity of the conduction band edge at the SiO2/SiC interface by low temperature conductance measurements

Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO₂/Al₂O₃Gate-Stack

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Effect of process variations and ambient temperature on electron mobility at the SiO/sub 2//4H-SiC interface

Cited by 143 publications

References 9 publications

Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Influence of the surface morphology on the channel mobility of lateral implanted 4H-SiC(0001) metal-oxide-semiconductor field-effect transistors

Characterization of very fast states in the vicinity of the conduction band edge at the SiO2/SiC interface by low temperature conductance measurements

Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO2/Al2O3Gate-Stack

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Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO₂/Al₂O₃Gate-Stack