Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

Yoo, Ook Sang; Oh, Jungwoo; Kang, Chang Yong; Lee, Byoung Hun; Han, In Shik; Choi, Won Ho; Kwon, Hyuk Min; Na, Min Ki; Majhi, P.; Tseng, Hsing Huang; Jammy, R.; Wang, Jin Suk; Lee, Hi Deok

doi:10.1016/j.mseb.2008.06.031

Cited by 6 publications

(3 citation statements)

References 11 publications

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“…There is also a trend of decreasing EOT values, with the maximum EOT (2.30 nm) being reported for the MWA MOSC (see Table I). Several studies have shown that the EOT reduction is mainly due to the densification of high-k materials, 19,27) but in our study there is a minimal difference in the physical thickness of the high-k material (HfO 2 ) for all the HPA MOSCs, as verified by the TEM images in Fig. 5.…”

Section: Resultssupporting

confidence: 65%

“…16,17) For the equivalent oxide thickness (EOT), it is realized that the growth of low-k interfacial layers between high-k layers and substrates could lead to an undesired increase in EOT after annealing. [18][19][20][21] Several studies have proposed high-pressure annealing (HPA) as a potential new solution to the undesired problems related to device characteristics. HPA outclasses furnace annealing in terms of thermal uniformity and high thermal budget and can also suppress diffusion of several species.…”

Section: Introductionmentioning

confidence: 99%

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Studies on the electrical characteristics of a high-k dielectric/metal gate MOS capacitor by high-pressure annealing

Kumar¹,

divya²,

Lee³

et al. 2022

Jpn. J. Appl. Phys.

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High pressure annealing technique at 6 atm over a wide range of temperature (200-450˚C) was introduced as post metal annealing on high-k/metal gate metal-oxide-semiconductor capacitor. To verify the ability of HPA in improving interface trap density, leakage issue the other MOS capacitor with same structure was annealed by MWA for comparison. The electrical performance of the capacitors under different etching mechanism was analyzed and the difference in characteristics such as flat-band voltage shift, oxide trapped charge, interface state density and leakage current were compared. The results show that high pressure annealing process is more effective to minimize the oxide trapped charged at low temperature than by high power MWA at 3000W, and the reduction in leakage current density after high pressure anneal at low temperature corresponds to the reduction in charge traps. High pressure annealing demonstrates great potential as the post-metallization annealing process for the high-k/metal gate structure .

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Section: Resultssupporting

confidence: 65%

Section: Introductionmentioning

confidence: 99%

Studies on the electrical characteristics of a high-k dielectric/metal gate MOS capacitor by high-pressure annealing

Kumar¹,

divya²,

Lee³

et al. 2022

Jpn. J. Appl. Phys.

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show abstract

“…RTA annealed sample mobility is lower than MWA annealed samples, indicating that mobility decreases significantly due to stress relaxation during the high annealing temperature process. 22) However, annealing by MWA at 2400 W possesses the highest mobility of 2.35 × 10 4 cm 2 V −1 s −1 and the lowest sheet resistance of 132 ohm sq −1 at 2400 W. It can be confirmed that Ge content materials are very sensitive to 2.45 GHz microwave frequency, and hence the mobility will decrease if stress relaxation occurs. The main purpose of this study is to achieve high dopant activation and avoid stress relaxation.…”

Section: Dopant Activation Level By Rta and Mwa With Different Frequencymentioning

confidence: 92%

Study on dopant activation and EOT impact in HKMG stacks using microwave annealing with different frequencies

Divya,

Chen,

Lee

et al. 2024

Jpn. J. Appl. Phys.

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We have examined the dopant activation levels of various materials(Si, SiGe & Ge) annealed at two different frequency i.e., 2.45GHz and 5.8GHz microwave annealing (MWA) with the aim of identifying a material-targeted annealing method that will minimize the annealing process of high thermal budget. Furthermore, we also fabricated high-k/metal gate MOSCAP structure annealed at 2.45GHz and 5.8GHz MWA as the post-metallization annealing process. The results show that microwave annealing at 2.45GHz is more efficient than high frequency 5.8GHz MWA at 3000W in minimizing the interface trapped charged and the reduction in leakage current density. However, there is slight clear reduction in capacitance as the frequency increased to 5.8GHz resulting in increase of interfacial layer thickness. Due to undesirable effects such as Al diffusion into the dielectric layer, microwave annealing at 2.45GHz demonstrates great a potential candidate as a post-metallization annealing method for high-k/metal gate structures.

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Effect of substitutional carbon concentration on Schottky-barrier height of nickel silicide formed on epitaxial silicon-carbon films

Lim¹,

Lee²,

Sinha³

et al. 2009

Journal of Applied Physics

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The effective electron Schottky barrier height (ΦBN) of nickel silicide (NiSi:C) formed on silicon-carbon (Si1−yCy or Si:C) films with different substitutional carbon concentrations Csub was investigated. ΦBN was observed to decrease substantially with an increase in Csub. When Csub is increased from 0% to 1.5%, ΦBN is reduced by 200 meV. The results of this work could be useful for the reduction in contact resistance between nickel silicide and silicon-carbon source and drain in strained n-channel metal-oxide-semiconductor field-effect transistors.

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Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

Cited by 6 publications

References 11 publications

Studies on the electrical characteristics of a high-k dielectric/metal gate MOS capacitor by high-pressure annealing

Studies on the electrical characteristics of a high-k dielectric/metal gate MOS capacitor by high-pressure annealing

Study on dopant activation and EOT impact in HKMG stacks using microwave annealing with different frequencies

Effect of substitutional carbon concentration on Schottky-barrier height of nickel silicide formed on epitaxial silicon-carbon films

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