Effects of Charge Trapping on Memory Characteristics for HfO2-Based Ferroelectric Field Effect Transistors

Abstract

A full understanding of the impact of charge trapping on the memory window (MW) of HfO2-based ferroelectric field effect transistors (FeFETs) will permit the design of program and erase protocols, which will guide the application of these devices and maximize their useful life. The effects of charge trapping have been studied by changing the parameters of the applied program and erase pulses in a test sequence. With increasing the pulse amplitude and pulse width, the MW increases first and then decreases, a result attributed to the competition between charge trapping (CT) and ferroelectric switching (FS). This interaction between CT and FS is analyzed in detail using a single-pulse technique. In addition, the experimental data show that the conductance modulation characteristics are affected by the CT in the analog synaptic behavior of the FeFET. Finally, a theoretical investigation is performed in Sentaurus TCAD, providing a plausible explanation of the CT effect on the memory characteristics of the FeFET. This work is helpful to the study of the endurance fatigue process caused by the CT effect and to optimizing the analog synaptic behavior of the FeFET.

Electrical Properties of Laser Patterned Schottky Diode with ALD-Grown TiO2 Interlayer

“…The formation of heterojunctions is the key to tuning the electronic and optoelectronic properties of various semiconductor devices. The formation and importance of semiconducting heterojunction devices based on metal oxides have been widely reported. − TiO 2 is a high-dielectric, high-refractive, big band gap material that is widely employed in many different electronic devices, especially in the memory, photovoltaic, and optical coatings industries. , It is being investigated in several papers for application at the MS interface to provide barrier modification in addition to the semiconductor layer’s surface passivation. Before Schottky metallization, a TiO 2 thin-film layer deposition provides several technological benefits, including enhanced device impedance characteristics and shielding the semiconductor surface from defective interfacial compounds. , In other words, because of potential interfacial reactions resulting from the deposition of a rectifying metal contact, TiO 2 can be added to the MS interface to control the defective states.…”

“…The formation and importance of semiconducting heterojunction devices based on metal oxides have been widely reported. 3 − 5 TiO 2 is a high-dielectric, high-refractive, big band gap material that is widely employed in many different electronic devices, especially in the memory, photovoltaic, and optical coatings industries. 6 , 7 It is being investigated in several papers for application at the MS interface to provide barrier modification in addition to the semiconductor layer’s surface passivation.…”