Effects of fluorine incorporation on the properties of Ge p-MOS capacitors with HfTiON dielectric

Li, C.X.; Leung, C. H.; Peng, Lai; Xu, Jing-Ping

doi:10.1016/j.sse.2010.03.002

Cited by 22 publications

(11 citation statements)

References 17 publications

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“…The low-concentration O 2 was used to remove the carbon and hydrogen in the plasma. 10 Then, 15-nm Al 2 O 3 was deposited by atomic layer deposition using trimethyl-aluminum (Al(CH3) 3 ) and H 2 O as precursors at 300 C. Following that, all the samples went through a post-deposition annealing in N 2 at 900 C for 30 s. Finally, Al was evaporated and patterned as gate electrodes followed by a forming-gas annealing at 300 C for 20 min. The sample without fluorine treatment was denoted as ZrO, while the samples with 150-s and 400-s fluorine treatment were denoted as LF-ZrO and HF-ZrO, respectively.…”

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confidence: 99%

Charge-trapping characteristics of fluorinated thin ZrO2 film for nonvolatile memory applications

Huang

Shi²,

Lai³

2014

Applied Physics Letters

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The effects of fluorine treatment on the charge-trapping characteristics of thin ZrO2 film are investigated by physical and electrical characterization techniques. The formation of silicate interlayer at the ZrO2/SiO2 interface is effectively suppressed by fluorine passivation. However, excessive fluorine diffusion into the Si substrate deteriorates the quality of the SiO2/Si interface. Compared with the ZrO2-based memory devices with no or excessive fluorine treatment, the one with suitable fluorine-treatment time shows higher operating speed and better retention due to less resistance of built-in electric field (formed by trapped electrons) against electron injection from the substrate and smaller trap-assisted tunneling leakage, resulting from improved ZrO2/SiO2 and SiO2/Si interfaces.

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mentioning

confidence: 99%

Charge-trapping characteristics of fluorinated thin ZrO2 film for nonvolatile memory applications

Huang

Shi²,

Lai³

2014

Applied Physics Letters

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“…Compared with the control sample, the F-150s and F-300s samples have larger magnitudes for these two parameters. It is probably because that fluorine incorporation can cause the reduction of negative charge [4]. shows the gate leakage current density (J g ) of the samples.…”

Section: Resultsmentioning

confidence: 99%

Effects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La<inf>2</inf>O<inf>3</inf> gate dielectric

Qian

Huang

Peng

2011

2011 IEEE International Conference of Electron Devices and Solid-State Circuits

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In this work, the effects of fluorine incorporation by using plasma on the electrical properties of Si MOS capacitor with La 2 O 3 gate dielectric are investigated. From the capacitance-voltage (C-V) curve and gate leakage current, it is demonstrated that the F-plasma treatment can effectively suppress the growth of interfacial layer, and thus improve the electrical properties of the device in terms of accumulation capacitance, interface-state density and breakdown voltage.Index Terms -fluorine, high-k dielectric, interfacial layer , lanthanum oxide, MOS.

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“…As a result, high-k dielectric materials such as HfO 2 , ZrO 2 , and HfTaON are used as the gate dielectric of Ge MOS devices. Ge p-MOS capacitors with HfTiON gate dielectric are deposited by sputtering method by Li et al [39]. Predeposition fluorine plasma treatment and postdeposition fluorine plasma annealing are implemented to improve the electrical and reliability properties of Ge p-MOS capacitors.…”

Section: Germanium Substratesmentioning

confidence: 99%

Advanced CMOS Gate Stack: Present Research Progress

Zhao

Werner

Taylor

et al. 2012

ISRN Nanotechnology

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The decreasing sizes in complementary metal oxide semiconductor (CMOS) transistor technology require the replacement of SiO 2 with gate dielectrics that have a high dielectric constant (high-k). When the SiO 2 gate thickness is reduced below 1.4 nm, electron tunneling effects and high leakage currents occur which present serious obstacles for device reliability. In recent years, various alternative gate dielectrics have been researched. Following the introduction of HfO 2 into the 45 nm process by Intel in 2007, the screening and selection of high-k gate stacks, understanding their properties, and their integration into CMOS technology have been a very active research area. This paper reviews the progress and efforts made in the recent years for high-k dielectrics, which can be potentially integrated into 22 nm (and beyond) technology nodes. Our work includes deposition techniques, physical characterization methods at the atomic scale, and device reliability as the focus. For most of the materials discussed here, structural and physical properties, dielectric relaxation issues, and projections towards future applications are also discussed.

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Effects of fluorine incorporation on the properties of Ge p-MOS capacitors with HfTiON dielectric

Cited by 22 publications

References 17 publications

Charge-trapping characteristics of fluorinated thin ZrO2 film for nonvolatile memory applications

Charge-trapping characteristics of fluorinated thin ZrO2 film for nonvolatile memory applications

Effects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La<inf>2</inf>O<inf>3</inf> gate dielectric

Advanced CMOS Gate Stack: Present Research Progress

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