Effects of microstructure on the formation, shape, and motion of voids during electromigration in passivated copper interconnects

Abstract

In situ scanning electron microscope observations have been performed on passivated damascene Cu interconnect segments of different widths during accelerated electromigration tests. In some cases, voids form and grow at the cathode. However, an alternative failure mode is also observed, during which voids form distant from the cathode end of the interconnect segment and drift toward the cathode, where they eventually lead to failure. The number of observations of this failure mode increased with increasing linewidth. During void motion, the shape and the velocity of the drifting voids varied significantly. Postmortem electron backscattered diffraction (EBSD) analysis was performed after in situ testing, and a correlation of EBSD data with the in situ observations reveals that locations at which voids form, their shape evolution, and their motion all strongly depend on the locations of grain boundaries and the crystallographic orientations of neighboring grains. a) Present address:

Modeling the copper microstructure and elastic anisotropy and studying its impact on reliability in nanoscale interconnects

“…Experimental data have shown reliability lifetimes of copper interconnects to be dependent on microstructure, texture distribution, and grain size distribution (KIM 2006;Ryu et al 1999;Choi et al 2007;Choi et al 2008). Further, Copper has a very anisotropic mechanical behavior (Kocks et al 2000;Yeap et al 2011) and is known to impact stress voiding and electromigration lifetime (Nucci et al 1997;Ryu et al 1997).…”

An investigation of electromigration induced void nucleation time statistics in short copper interconnects

“…In addition one might expect the intrasample variation in D values to be as great as the intersample variation. 27,28 Even more important than the failure-time distribution for a particular metallization process/test-structure is the failure-time distribution of a whole chip. This involves, at its simplest, connected tree structures of metal interconnect at a single metallization level, and a number of system level simulators have been introduced, the most recent of which SYSREL ͑Ref.…”

“…27,28 In addition it is well known that lines with a strong ͑111͒ texture tend to have longer failure-times. 34 An obvious conclusion is that such grains have lower diffusivities than other orientations and act as semiblocking grains in much the same way that bamboo grains can block grain boundary diffusion in aluminum interconnect.…”

Physically based models of electromigration: From Black’s equation to modern TCAD models

“…It has been shown that high stress can develop at grain boundaries away from the cathode end of the line [45], where voids have frequently seen to nucleate [46,[52][53][54][55]. Sukharev et al showed that the failure mechanism dramatically changes according to the dominant diffusivity path [16,41,42,56,57].…”

“…Sukharev et al showed that the failure mechanism dramatically changes according to the dominant diffusivity path [16,41,42,56,57]. When the copper/capping layer interface is the dominant diffusivity path, the failure typically occurs by a void that forms at this interface, migrates to the cathode end of the line, and grows [55]. However, if the copper/capping layer goes through a strengthening process [57,58], in such a way that the diffusivity along this path is reduced to the same level as that of grain boundaries, grain boundary diffusion and diffusion along the copper/barrier layer interface play a more important role.…”