2006
DOI: 10.1080/10426910600727833
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Effects of Sintering Process Conditions on Size Shrinkages of Low-Temperature Co-Fired Ceramic Substrate

Abstract: The effects of sintering process conditions on the size shrinkages of low-temperature co-fired ceramic (LTCC) substrate were investigated. The process variables investigated were thickness of the stacked raw tapes, lamination pressure, lamination-pressure holding time, pre-heating time, debinding time, sintering dwell time, and sintering temperature ramp. Results revealed that the size shrinkage percentage of the LTCC samples in the lateral directions was always smaller than that in the thickness direction. Th… Show more

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Cited by 11 publications
(5 citation statements)
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“…, and is identical to that obtained by Fang and Zhang 16 with M ¼ 0 and by Yacob and Ishak 21 with K ¼ 0. The comparison of the flow velocity f 0 ð Þ obtained by FEM and by analytical method from equation ( 28) is tabulated in Table 2.…”
Section: Finite Element Formulationsupporting
confidence: 89%
See 2 more Smart Citations
“…, and is identical to that obtained by Fang and Zhang 16 with M ¼ 0 and by Yacob and Ishak 21 with K ¼ 0. The comparison of the flow velocity f 0 ð Þ obtained by FEM and by analytical method from equation ( 28) is tabulated in Table 2.…”
Section: Finite Element Formulationsupporting
confidence: 89%
“…For the case of viscous fluid (K=0) and in the absence of buoyancy force (σ=0), the exact solution for f(η) subject to the boundary conditions as in equation (22) is given as follows where μ=(λ±λ2-4)/2, and is identical to that obtained by Fang and Zhang 16 with M=0 and by Yacob and Ishak 21 with K=0. The comparison of the flow velocity f'(η) obtained by FEM and by analytical method from equation (28) is tabulated in Table 2.…”
Section: Fem Solutionsmentioning
confidence: 83%
See 1 more Smart Citation
“…Silicon nanowires may become crucial components for ultra‐low power devices (Pott and Ionescu, 2006). Precision manufacturing of silicon and advanced substrates also face more new challenges (Shankar and Zhong, 2006; Young et al , 2006; Zhong et al , 2006; Paehler et al , 2007; Schoenfelder et al , 2007).…”
Section: Introductionmentioning
confidence: 99%
“…Distributing reliable power, ground, data, address and other signals among IC chips and microelectronics devices through interconnections at such high speeds is a challenge (Kaushik et al , 2006). Precision machining/manufacturing of silicon, ceramic and polymer substrates (Zhong and Lee, 2001; Narasimhan, 2005; Zimmermann et al , 2005; Young et al , 2006; Zhong et al , 2006a; Schoenfelder et al , 2007), microelectronics packaging, and detection/analysis of various defects (Paehler et al , 2007) also face more and more new challenges.…”
Section: Introductionmentioning
confidence: 99%