Effects of wafer bow and warpage on performance of electrostatic chucks in high volume manufacturing

Kurkowski, P.; Drizlikh, S.; Sarver, R.; Angis, H.; Loisel, Patrick

doi:10.1109/asmc.2005.1438780

Cited by 6 publications

(3 citation statements)

References 1 publication

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“…Besides all the above factors of clamping force, Choe OE2 studied the behaviors of wafer taking RF electric field into considerations and provided a comprehensive equation of clamping force, qE C F He G F ESC 6 0; (6) where qE represents the RF electric field force, E is always changing following RF power; F He is the force generated by the pressure of the interface gas helium; G is gravity; and F ESC is the electrostatic force. In Equation ( 6), a positive sign means the force is upwards.…”

Section: J-r Typementioning

confidence: 99%

Design space of electrostatic chuck in etching chamber

Sun

Cheng

et al. 2015

J. Semicond.

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One of the core semiconductor devices is the electrostatic chuck. It has been widely used in plasma-based and vacuum-based semiconductor processing. The electrostatic chuck plays an important role in adsorbing and cooling/heating wafers, and has technical advantages on non-edge exclusion, high reliability, wafer planarity, particles reduction and so on. This article extracts key design elements from the existing knowledge and techniques of electrostatic chuck by the method proposed by Paul and Beitz, and establishes a design space systematically. The design space is composed of working objects, working principles and working structures. The working objects involve electrostatic chuck components and materials, classifications, and relevant properties; the working principles involve clamping force, residual force, and temperature control; the working structures describe how to compose an electrostatic chuck and to fulfill the overall functions. The systematic design space exhibits the main issues during electrostatic chuck design. The design space will facilitate and inspire designers to improve the design quality and shorten the design time in the conceptual design.

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Section: J-r Typementioning

confidence: 99%

Design space of electrostatic chuck in etching chamber

Sun

Cheng

et al. 2015

J. Semicond.

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“…Wafer warpage research on single IC today is rather fruitful [1][2][3][4][5]. In fact, warpage issues involved not only that of single IC wafer but also multiple wafers with bonding [6] [7].…”

Section: Introductionmentioning

confidence: 99%

Warpage and stress optimization of wafer-level package of MEMS with glass frit bonding

Zhu

et al. 2014

2014 15th International Conference on Electronic Packaging Technology

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Warpage issue of wafer level package (WLP) has caught the attention of WLP industry. This paper aims at the warpage characteristics and optimization of the WLP (consisting of silicon MEMS wafer and silicon cover wafer) with glass frit bonding. Finite-element method (FEM) was used to study the warpage and stress optimization of the Si-Si bonding WLP. Some factors which affect WLP warpage, such as CTE (coefficient of thermal expansion) and Young's modulus of glass frit, ring thickness & width of glass frit and bonding temperature etc. were optimized. The stress of WLP was also calculated and the reliability level of the MEMS device was estimated. It turned out that CTE and Young modulus of glass frit are the key parameters for decreasing WLP warpage and stress and promoting the MEMS WLP. Ring width of glass frit and the thickness of silicon cover plate wafer have little impacts on WLP stress and warpage. With the optimized parameters taken into account, the stress in MEMS WLP falls down. Those optimization results have been put into actual WLP manufacture. Keywords-warpage; stress; optimization; glass frit; wafer level package (WLP); finite-element method (FEM); MOS (multi-beam optical sensor) deformation measurement; micro electro mechanical systems (MEMS)

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“…In the late 20th century, wafer warp research focused on semiconductor integrated circuit wafer [1][2][3]. Since the 21st century, with the increase of micro system integration, WLP developed fast and is becoming a hot spot of today's microelectronic packaging.…”

Section: Introductionmentioning

confidence: 99%

Warpage characteristics of wafer-level package of MEMS with glass frit bonding

Wang

Zhu

et al. 2013

2013 14th International Conference on Electronic Packaging Technology

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Warpage is one of the challenging problems for wafer level package (WLP). Especially, the bonding process of multiple wafers will bring additional stress to WLP and warpage of WLP. This paper aims at the stress and warpage characteristics of the WLP (consisting of silicon cover wafer and silicon MEMS wafer) with glass frit bonding. The finite element (FE) method and MOS (Multi-beam Optical Sensor) technology were used. Simulation result indicated that WLP presents almost zero warpage. MOS measurement result indicated that WLP actually presents convex warpage instead of zero warpage. It turned out that the convex warpage results from the temperature difference between WLP wafers (i.e. cover wafer and MEMS wafers) in the course of post-bond cooling. Taken the temperature difference into account, the simulation result was consistent with experiment results. Furthermore, on the basis of the convex warpage value the stress of WLP was also calculated so as to understand the stress distribution and estimate the reliability level of the MEMS device. Keywords-warpage,wafer level package(WLP), finite element method(FEM), micro Electro mechanical systems(MEMS), multibeam optical sensor (MOS)

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Effects of wafer bow and warpage on performance of electrostatic chucks in high volume manufacturing

Cited by 6 publications

References 1 publication

Design space of electrostatic chuck in etching chamber

Design space of electrostatic chuck in etching chamber

Warpage and stress optimization of wafer-level package of MEMS with glass frit bonding

Warpage characteristics of wafer-level package of MEMS with glass frit bonding

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