Efficient CNTFET-based Ternary Full Adder Cells for Nanoelectronics

Moaiyeri, Mohammad Hossein; Mirzaee, Reza Faghih; Navi, Keivan; Hashemipour, Omid

doi:10.5101/nml.v3i1.p43-50

Cited by 15 publications

(25 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The main drawback of the cell presented in Ref. [18] is that the second voltage division leads to very narrow voltage zones. It results in high sensitivity to voltage and process variations and reduction in the immunity to noise.…”

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

“…TFA presented in Ref. [18] is highly sensitive to any variations including temperature. Therefore, it is not applicable in low-voltages and real-world applications.…”

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

“…Exhaustive simulations have been performed on the proposed design and the structures presented in Refs. [18,19]. Simulations are performed by using Synopsys HSPICE with the Compact SPICE model for 32 nm CNFETs technology.…”

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

See 2 more Smart Citations

Design and Evaluation of an Efficient Carbon Nano-Tube Field Effect Transistor-Based Ternary Full Adder Cell for Nanotechnology

Maeen¹,

Navi²

2014

Jnl of Comp & Theo Nano

Self Cite

View full text Add to dashboard Cite

Novel high performance ternary full adder for nanotechnology is presented here. This design benefits from the unique properties of carbon nano-tube field effect transistors. CNFETs are very suitable for the multiple-threshold method to design voltage-mode multiple-valued logic circuits. MVL reduces circuit overhead such as interconnects and chip area by improving the ability of data transferring in comparison with binary systems. It decreases the number of operations necessary to implement a particular mathematical function. Proposed ternary circuit is based on ternary inverters and the great advantage of the new structure is its very short critical path and low number of transistor which lead to higher speed operation, lower energy consumption and excellent driving capability. Intensive simulations, run on Synopsys HSPICE with 32 nm CNFET technology, show significant improvements in terms of speed and power delay product over previously presented works.

show abstract

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

“…TFA presented in Ref. [18] is highly sensitive to any variations including temperature. Therefore, it is not applicable in low-voltages and real-world applications.…”

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

See 1 more Smart Citation

Design and Evaluation of an Efficient Carbon Nano-Tube Field Effect Transistor-Based Ternary Full Adder Cell for Nanotechnology

Maeen¹,

Navi²

2014

Jnl of Comp & Theo Nano

Self Cite

View full text Add to dashboard Cite

show abstract

“…Among these alternative technologies, the CNTFET is the most encouraging substitution for the conventional MOSFET family due to its similarities to MOSFET in terms of electrical properties and manufacturing process [26]. Up to now, many circuits have been successfully designed based on CNTFET technology, such as binary and ternary full adder cells, SRAM storage cells, multiple-valued logic circuits, and min-max circuits [27], [17]- [19], [21]- [24], [28]. The CNTFET can also be applied in polylactic acid structures [29].…”

Section: Introductionmentioning

confidence: 99%

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Zarhoun

2014

ETRI J

View full text Add to dashboard Cite

The integration of digital circuits has a tight relation with the scaling down of silicon technology. The continuous scaling down of the feature size of CMOS devices enters the nanoscale, which results in such destructive effects as short channel effects. Consequently, efforts to replace silicon technology with efficient substitutes have been made. The carbon nanotube fieldeffect transistor (CNTFET) is one of the most promising replacements for this purpose because of its essential characteristics. Various digital CNTFET-based circuits, such as standard logic cells, have been designed and the results demonstrate improvements in the delay and energy consumption of these circuits. In this paper, a new CNTFET-based 5-input XOR gate based on a novel design method is proposed and simulated using the HSPICE tool based on the compact SPICE model for the CNTFET at the 32-nm technology node. The proposed method leads to improvements in performance and device count compared to the conventional CMOS-style design.

show abstract

“…Shahid Beheshti University G. C., Tehran, Iran *Corresponding author. E-mail: navi@sbu.ac.ir large parametric variation, reduced gate control, shortchannel effects, very high leakage currents and high power densities, makes the scientists and researchers eager to work toward the new nanotechnologies such as quantum-dot cellular automata [3] and CNFETs [4][5][6] as the possible successors to the conventional siliconbased MOSFET technology. Moreover, due to the similarities between MOSFETs and CNFETs in terms of intrinsic characteristics and operation, CNFET seems to be more feasible and promising, compared to the other emerging nanotechnologies.…”

Section: Introductionmentioning

confidence: 99%

Comparative Performance Evaluation of Large FPGAs with CNFET- and CMOS-based Switches in Nanoscale

2011

Self Cite

View full text Add to dashboard Cite

Routing resources are the major bottlenecks in improving the performance and power consumption of the current FPGAs. Recently reported researches have shown that carbon nanotube field effect transistors (CNFETs) have considerable potentials for improving the delay and power consumption of the modern FPGAs. In this paper, hybrid CNFET-CMOS architecture is presented for FPGAs and then this architecture is evaluated to be used in modern FPGAs. In addition, we have designed and parameterized the CNFET-based FPGA switches and calibrated them for being utilized in FPGAs at 45 nm, 22 nm and 16 nm technology nodes. Simulation results show that the CNFET-based FPGA switches improve the current FPGAs in terms of performance, power consumption and immunity to process and temperature variations. Simulation results and analyses also demonstrate that the performance of the FPGAs is improved about 30%, on average and the average and leakage power consumptions are reduced more than 6% and 98% respectively when the CNFET switches are used instead of MOSFET FPGA switches. Moreover, this technique leads to more than 20.31% smaller area. It is worth mentioning that the advantages of CNFET-based FPGAs are more considerable when the size of FPGAs grows and also when the technology node becomes smaller.

show abstract

Efficient CNTFET-based Ternary Full Adder Cells for Nanoelectronics

Cited by 15 publications

References 19 publications

Design and Evaluation of an Efficient Carbon Nano-Tube Field Effect Transistor-Based Ternary Full Adder Cell for Nanotechnology

Design and Evaluation of an Efficient Carbon Nano-Tube Field Effect Transistor-Based Ternary Full Adder Cell for Nanotechnology

An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETs

Comparative Performance Evaluation of Large FPGAs with CNFET- and CMOS-based Switches in Nanoscale

Contact Info

Product

Resources

About