Efficient implementation of error-feedback LSLalgorithm

Miranda, María Dolores Martínez; Gerken, M.; Silva, Magno T. M.

doi:10.1049/el:19990948

Cited by 16 publications

(11 citation statements)

References 3 publications

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“…Revista da Sociedade Brasileira de Tellec~onrmruc;ac;<:>es Volume 15, Numero 2, dezembro 2000 of implementation of those algorithms in hardware and software and their application to channel equalization and echo cancelation can be found in [1,2,3,5,6]. Several of those algorithms deal directly with the coefficient vector w M ( n) while others use it only indirectly, for example through the coefficients of a lattice structure.…”

Section: Identification Of An Unknown System Is a Central Issue Inmentioning

confidence: 99%

Condition Number of Data Matrix and Persistent Excitation Conditions in RLS Adaptive Filtering

Gerken¹,

Burt²,

Miranda³

2000

JCIS

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Section: Identification Of An Unknown System Is a Central Issue Inmentioning

confidence: 99%

Condition Number of Data Matrix and Persistent Excitation Conditions in RLS Adaptive Filtering

Gerken¹,

Burt²,

Miranda³

2000

JCIS

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“…The implementation of the LSL filter with error-feedback [16][17][18] has proven good numerical behavior. In [16], it was shown that the filter can be efficiently implemented in field programmable gate arrays (FPGA).…”

Section: Introductionmentioning

confidence: 99%

Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA

Pohl

Tichý

Kadlec

2008

EURASIP J. Adv. Signal Process.

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A high performance RLS lattice filter with the estimation of an unknown order and forgetting factor of identified system was developed and implemented as a PCORE coprocessor for Xilinx EDK. The coprocessor implemented in FPGA hardware can fully exploit parallelisms in the algorithm and remove load from a microprocessor. The EDK integration allows effective programming and debugging of hardware accelerated DSP applications. The RLS lattice core extended by the order and forgetting factor estimation was implemented using the logarithmic numbers system (LNS) arithmetic. An optimal mapping of the RLS lattice onto the LNS arithmetic units found by the cyclic scheduling was used. The schedule allows us to run four independent filters in parallel on one arithmetic macro set. The coprocessor containing the RLS lattice core is highly configurable. It allows to exploit the modular structure of the RLS lattice filter and construct the pipelined serial connection of filters for even higher performance. It also allows to run independent parallel filters on the same input with different forgetting factors in order to estimate which order and exponential forgetting factor better describe the observed data. The FPGA coprocessor implementation presented in the paper is able to evaluate the RLS lattice filter of order 504 at 12 kHz input data sampling rate. For the filter of order up to 20, the probability of order and forgetting factor hypotheses can be continually estimated. It has been demonstrated that the implemented coprocessor accelerates the Microblaze solution up to 20 times. It has also been shown that the coprocessor performs up to 2.5 times faster than highly optimized solution using 50 MIPS SHARC DSP processor, while the Microblaze is capable of performing another tasks concurrently.

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“…As deduções dos três primeiros podem ser encontradas em [1], as modificações introduzidas no algoritmo EF-LSL em [2] e a dedução do algoritmo Acelerador em [5] e [6]. Tabelas dos mesmos e números de operações por iteração estão mostrados nas sub-seções seguintes.…”

Section: Equalizador Linear Transversal (Lte)unclassified

“…variáveis intermediárias introduzidas em [2] para diminuir a complexidade computacional do algoritmo original desenvolvido por Ling et al em [3]. Deve-se notar ainda que na Tabela 2.3, as amostras do sinal de entrada consideradas no instante n são …”

Section: Algoritmo Ef-lsl Modificadounclassified

“…Por meio de simulações, pode ser verificado que apresenta um comportamento estável e resultados precisos em precisão finita para um grande número de situações práticas, apesar da inexistência de uma prova formal de sua estabilidade numérica [2]. O algoritmo apresentado na Tabela 2.3 possui complexidade computacional de 13M multiplicações, 2M divisões e 9M somas a cada iteração, considerando sinais reais.…”

Efficient implementation of error-feedback LSLalgorithm

Cited by 16 publications

References 3 publications

Condition Number of Data Matrix and Persistent Excitation Conditions in RLS Adaptive Filtering

Condition Number of Data Matrix and Persistent Excitation Conditions in RLS Adaptive Filtering

Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA

Equalização não-linear de canais de comunicação.

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