Efficient large size transforms for high-performance video coding

Joshi, Rajan; Reznik, Yuriy A.; Karczewicz, Marta

doi:10.1117/12.862250

Cited by 11 publications

(4 citation statements)

References 12 publications

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“…Discrete trigonometric transforms are widely used in solving problems in many modern computing systems for digital signal and image processing, including filtering and denoising, noisy speech enhancement, interpolation, video coding, etc. [1][2][3][4][5][6][7][8][9][10]. There are eight different types of discrete cosine transform and eight types of discrete sine transform [11].…”

Section: Introductionmentioning

confidence: 99%

The Development of Fast DST-II Algorithms for Short-Length Input Sequences

Bielak,

Cariow,

Raciborski

2024

Electronics

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The subject of this work is the development of fast algorithms for the discrete sinusoidal transformation of the second type (DST-II) for sequences of input data of small length N = 2, 3, 4, 5, 6, 7, 8. The starting point for the development of algorithms is the well-known possibility of representing any discrete transformation in the form of a matrix–vector product. Due to the remarkable structural properties of the matrices of the DST-II transformation base, these matrices can be successfully factorized, which should lead to a reduction in the computational complexity of the procedure as a whole. You can factorize matrices in different ways. The art of designing fast algorithms is to find the factorization that produces the maximum effect. We justified the correctness of the obtained algorithmic solutions theoretically, using strict mathematical derivations of each of them. The developed algorithms were then further tested using MATLAB R2023b software to finally confirm their performance. Finally, we presented estimates of the computational complexity for each solution obtained and compared them with direct computational methods that rely on the direct calculation of matrix–vector products.

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Section: Introductionmentioning

confidence: 99%

The Development of Fast DST-II Algorithms for Short-Length Input Sequences

Bielak,

Cariow,

Raciborski

2024

Electronics

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“…The resulting lifting scheme-based architecture, inspired by [11][12][13], is simplified, exploiting the techniques proposed in [9,14] to achieve a multiplierless implementation. Other techniques can be employed to achieve multiplierless solutions, such as the ones proposed in [8,[15][16][17][18], but they are not discussed in this work. In this work, the proposed multisize DCT architecture supports all the block sizes of HEVC and is proposed for the real-time processing of 1080P HD video sequences.…”

Section: Introductionmentioning

confidence: 99%

N Point DCT VLSI Architecture for Emerging HEVC Standard

2012

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This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, up to , the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into sparse submatrices in order to reduce the multiplications. Finally, multiplications are completely eliminated using the lifting scheme. The proposed architecture sustains real-time processing of 1080P HD video codec running at 150 MHz.

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“…The design of the proposed transforms is fully recursive, coinciding with LLM factorizations for 4-point and 8-point transforms 18 . In odd parts we use a modification of Plonka-Tashe Type-IV DCT factorization 19 in which all factors are moved to the scaling stage 20 . .…”

Section: ) Transforms For Inter-prediction Residualsmentioning

confidence: 99%

A hybrid video codec based on extended block sizes, recursive integer transforms, improved interpolation, and flexible motion representation

et al. 2011

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This paper describes video coding technology proposal submitted by Qualcomm Inc. in response to a joint call for proposal (CfP) issued by ITU-T SG16 Q.6 (VCEG) and ISO/IEC JTC1/SC29/WG11 (MPEG) in January 2010. Proposed video codec follows a hybrid coding approach based on temporal prediction, followed by transform, quantization, and entropy coding of the residual. Some of its key features are extended block sizes (up to 64×64), recursive integer transforms, single pass switched interpolation filters with offsets (single pass SIFO), mode dependent directional transform (MDDT) for intra-coding, luma and chroma high precision filtering, geometry motion partitioning, adaptive motion vector resolution. It also incorporates internal bit-depth increase (IBDI), and modified quadtree based adaptive loop filtering (QALF). Simulation results are presented for a variety of bit rates, resolutions and coding configurations to demonstrate the high compression efficiency achieved by the proposed video codec at moderate level of encoding and decoding complexity. For random access hierarchical B configuration (HierB), the proposed video codec achieves an average BD-rate reduction of 30.88℅ compared to the H.264/AVC alpha anchor. For low delay hierarchical P (HierP) configuration, the proposed video codec achieves an average BD-rate reduction of 32.96℅ and 48.57℅, compared to the H.264/AVC beta and gamma anchors, respectively.

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Efficient large size transforms for high-performance video coding

Cited by 11 publications

References 12 publications

The Development of Fast DST-II Algorithms for Short-Length Input Sequences

The Development of Fast DST-II Algorithms for Short-Length Input Sequences

N Point DCT VLSI Architecture for Emerging HEVC Standard

A hybrid video codec based on extended block sizes, recursive integer transforms, improved interpolation, and flexible motion representation

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