Efficient passive energy harvesters at 950 MHz and 2.45 GHz for 100 μW applications in 65 nm CMOS

Haddad, Pierre-Antoine; Raskin, Jean‐Pierre; Flandre, Denis

doi:10.1109/icecs.2016.7841250

Cited by 4 publications

(7 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Fig. 12(a) shows the test bench of the SC booster, which includes an external voltage source, VOC, and series RS to emulate the RF-DC converter as explained in [4] and [6]. VOC is an open circuit output voltage of the RF-DC converter at a given applied power to the rectifier and RS represents Thévenin-equivalent resistance across the RF-DC converter.…”

Section: Simulation Resultsmentioning

confidence: 99%

A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices

Kim

Lee

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

View full text Add to dashboard Cite

Section: Simulation Resultsmentioning

confidence: 99%

A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices

Kim

Lee

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

View full text Add to dashboard Cite

“…Fig. 2.16 shows a complementary cross-coupled rectifier [68]- [70]. Its operating principle is similar to boosted-gate rectifier but all the transistors in main rectifier are cross-coupled to cancel the threshold voltage effect.…”

Section: Complementary Cross-coupled Rectifiermentioning

confidence: 99%

“…Instead of using discrete Schottky diode in [51], [81] and [82] to lower the diode forward voltage drop, the proposed low-power rectifier employs DC-boosted gate bias to compensate the transistor's V th . [70] and [83] focuses on design optimization methodology for conventional cross-coupled rectifier, with [83] using discrete MPPT PMU to boost and regulate V OUT . [70] achieves high PCE but it is pure circuit simulation with ideal current load.…”

Section: Measurement Setupmentioning

confidence: 99%

“…[70] and [83] focuses on design optimization methodology for conventional cross-coupled rectifier, with [83] using discrete MPPT PMU to boost and regulate V OUT . [70] achieves high PCE but it is pure circuit simulation with ideal current load. [84] consists of dual path with switch only at the input of low-power path and an additional reference path which uses same transistor type and same number of stages as per highpower rectifier.…”

Section: Measurement Setupmentioning

confidence: 99%

“…However, considering the relatively large coupling capacitors used and dummy capacitors placed on layout to mitigate process impact, it is comparable to prior works. APMC '17 [51] TMTT '19 [81] ICCSP '18 [82] ICECS '16 [70] JSSC '19 [83] TCAS '17 [84] This work TMTT '19 [81] ICCSP '18 [82] ICECS '16 [70] JSSC '19 [83] TCAS '17 [84] This work TMTT '19 [81] ICCSP '18 [82] ICECS '16 [70] JSSC '19 [83] TCAS '17 [84] This work Conjugate Gradient, Brent-Powell, Hooke-Jeeves) are useful when there is a certain degree of confidence in initial value of the parameters to be optimized.…”

Section: Measurement Setupmentioning

confidence: 99%

See 2 more Smart Citations

Power management in energy harvesting

Lau¹

View full text Add to dashboard Cite

A dual-path wide-power-range rectifier for RF energy harvesting is presented in this thesis. The proposed idea focuses on maximizing efficiency in harvesting energy from the surrounding environment and designated energy source to support wide variety of applications in low power devices' wireless charging. The harvester consists of a low-power rectifier, a high-power rectifier and a voltageaware block. In the low-power rectifier, novel DC-boosted gate bias technique is proposed to enhance power conversion efficiency (PCE) by improving forward peak current, reducing diode forward voltage drop and suppressing reverse leakage current. A novel internal body-biasing technique is proposed in the highpower rectifier to regulate the transistors' threshold voltage (V th ) for optimal efficiency. A voltage-aware block, which consists of a voltage detector, a switch and an adjustable-offset comparator, has been incorporated into the high-power rectification path to minimize overall power consumption.The proposed circuit is fabricated in 65 nm 6M/1P standard CMOS technology.Peak PCE of 70.4% is measured on the low-power rectifier with -5.5 dBm input power at 2.45 GHz when driving a 15 kΩ load. For high-power rectifier, peak PCE of 56.6% is measured with 1.3 dBm input power at 2.45 GHz when driving a 15 kΩ load. The chip has PCE higher than 20% over a 19.8 dB of extended input power range from -13.5 dBm to 6.3 dBm.

show abstract