Efficient real time hardware co-simulation for image enhancement applications

Abstract

Image enhancement techniques improve the visibility of the images. Enhancement results, the output image is more suitable for a specific application rather than input image. It is used in many image processing applications like medical imaging, SONAR and RADAR as a preprocessing step. Hence this paper presents the hardware co-simulation and implementation of image enhancement algorithms into FPGA. Recent improvements in synthesis tools for simulink suggest a feasible high-level approach to algorithm implementation for embedded DSP systems. The proposed work gives the implementation of efficient edge detection, negative image and image thresholdingI.