Present era of SOC's comprise analog, digital and mixed signal components housing on the same chip. In this environment processor plays a vital role. As the technology shrinking to sub-micrometer technology node, there exists a huge scope of undesirable hazards in processors. These hazards may lead to disturbance in area, power and timing which deviate from desired quantities. Our paper focuses mainly to solve some of these issues. In-order to tackle these problems, we are introducing the enhanced version of MIPS. Microprocessor without Interlocked Pipeline Stages (MIPS) is a recent architecture into the semi-conductor industry. This paper totally concentrates on designing the architecture in Verilog HDL. The design had been simulated and synthesized in Nc-launch and RTL-compiler licensed by cadence Inc respectively. The physical design of synthesized architecture had been carried on by Socencounter under slow.lib library of TSMC Cmos 180nm technology node. . Keywords-Hazard Detection Units , Low Power Processor , MIPS, RISC using MIPS1. Register Type (R-Type)

Malignant melanomas are the most serious form of skin cancer accounting for the majority of skin cancer related deaths. Histo-pathological images of skin tissues are analyzed for detecting various types of melanomas. The automatic analysis of these images can greatly facilitate the diagnosis task for dermato-pathologists. The first and foremost step in automatic histo-pathological image analysis is to accurately segment the images into dermal and epidermal layers along with segmenting other tissues structures such as nests and melanocytic cells which indicate the presence of cancer. In this paper, we present a novel technique for segmenting the dermalepidermal junction based on color features which are initially clustered using the Orientation Sensitive Fuzzy C-means algorithm (OS-FCM) and later refined with level set based algorithms. A few novel parameters which define the architecture of the dermis are then extracted. Experimental results on a small database of skin tissue images show the efficacy of the proposed methodology in differentiating between melanomas and naevi.

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Image enhancement techniques improve the visibility of the images. Enhancement results, the output image is more suitable for a specific application rather than input image. It is used in many image processing applications like medical imaging, SONAR and RADAR as a preprocessing step. Hence this paper presents the hardware co-simulation and implementation of image enhancement algorithms into FPGA. Recent improvements in synthesis tools for simulink suggest a feasible high-level approach to algorithm implementation for embedded DSP systems. The proposed work gives the implementation of efficient edge detection, negative image and image thresholdingI.