Efficient synthesis of OTA network for linear analog functions

2005 IEEE International Symposium on Circuits and Systems

et al.

Abstract-This paper presents an original methodology and algorithms for designing high-frequency analog filters. Filters are realized to meet AC performance specifications as closely as possible. Addressed design steps include parameter sizing, placement and routing. The explorative design method, based on tabu search, takes into account layout parasitics of the circuit. The synthesis strategy alternates between (1) a uniform sampling of the solution space and (2) a focused search of attractive regions. We also discuss the usage of a layout representation based on symbolic tiles for analog system synthesis. Experiments on filters demonstrate the quality of our solution.

Section: Methodsmentioning

confidence: 99%

An Explorative Tile-based Technique for Automated Constraint Transformation, Placement and Routing of High Frequency Analog Filters

Zhang

2005 IEEE International Symposium on Circuits and Systems

et al.

“…We also studied the accuracy of the layout parasitics module used for synthesis as compared to parasitic extraction after layout design. Experiments used three examples: a third order elliptic lowpass filter [20], a flash analog to digital converter (ADC) [16] and a second order sigma-delta modulator [4]. Figure 9 shows the architecture of the third order elliptic lowpass filter.…”

Section: Methodsmentioning

confidence: 99%

Layout-aware analog system synthesis based on symbolic layout description and combined block parameter exploration, placement and global routing

IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings.

Zhang

Doboli

This paper presents a new methodology for layout-aware synthesis of analog systems. The methodology combines block parameter exploration, block placement and global interconnect routing while maintaining an accurate perspective on the layout parasitics. An original system representation (called Layout Constraint Graphs -LCG) was developed for synthesis. The paper discusses how block parameter exploration, placement and global routing are expressed in terms of the LCG graph. AC and transient performances of each explored solution are obtained using SPICE simulations. Experiments show the generality of the synthesis methodology by providing results for several applications including filters and converters.

“…and capacitor values are in the range [1.0e−15, 1.0e−11] [13]. Even though feasibility domains are large, they must be fully analyzed to find good quality design points.…”

Section: Parameter Domain Pruning Using Simplified Affine Transfomentioning

confidence: 99%

“…The first synthesis experiment addressed the third-order elliptic lowpass filter shown in Figure 1 [13]. The goal was to find the capacitor values and transconductance parameters, so that the filter has a 3db bandwidth of 12Mhz and the magnitude error with respect to the ideal magnitude response is minimized.…”

Section: A Third-order Elliptic Lowpass Filtermentioning

confidence: 99%

Parameter Domain Pruning for Improving Convergence of Synthesis Algorithms

2005 IEEE International Symposium on Circuits and Systems

Doboli

Abstract-This paper presents a parameter domain pruning method. Parameter domain pruning aims to identify parameter sub-domains that are more likely to produce feasible and good design solutions. These parameter sub-domains are found using the proposed Simplified Affine Transforms (SAT) operators. Selected variable sub-domains can then be used as input to exploration-based synthesis tools and help improve the convergence of synthesis algorithm.