Proceedings Design, Automation and Test in Europe
DOI: 10.1109/date.1998.655963
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Efficient techniques for accurate modeling and simulation of substrate coupling in mixed-signal ICs

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Cited by 10 publications
(7 citation statements)
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“…The profiles used are taken from [9] and are described in Figure 4. The high-resistivity substrate is used in various BiC-MOS process, while the low-resistivity substrate is used in CMOS due to their latch-up suppressing properties.…”
Section: Resultsmentioning
confidence: 99%
“…The profiles used are taken from [9] and are described in Figure 4. The high-resistivity substrate is used in various BiC-MOS process, while the low-resistivity substrate is used in CMOS due to their latch-up suppressing properties.…”
Section: Resultsmentioning
confidence: 99%
“…Several techniques have been proposed to model and analyze substrate noise accurately in integrated circuit level [11]- [13]. However, these techniques require the detailed implementation information in transistors and time-intensive transistor-level simulation.…”
Section: B Substrate Noise Modelmentioning
confidence: 99%
“…Typically, finite difference methods or boundary element methods are used to solve for the substrate potential distribution due to injected noise sources [41]- [44]. Recently, these methods have been speeded up with similar acceleration techniques as in RF or interconnect simulation, e.g., using an eigendecomposition technique [45]. Their efficiency even allows one to perform some substrate design optimizations [46].…”
Section: A Numerical Simulation Of Analog and Mixed-signal Circuitsmentioning
confidence: 99%