Efficient Trojan Detection via Calibration of Process Variations

Cha, Byeongju; Gupta, Sandeep

doi:10.1109/ats.2012.64

Cited by 32 publications

(7 citation statements)

References 12 publications

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“…The proposed countermeasures in the past 11 years are trustworthy design, reverse engineering, functional test and side‐channel analysis. Trustworthy design [6–9] is to insert special modules or circuits into the target chips during the design phase . These modules or circuits can prevent the HT insertion in the manufacturing phase or increase the HT detection rate during the detection phase .…”

Section: Introductionmentioning

confidence: 99%

Thermal maps based HT detection using spatial projection transformation

Tang

Zhang³

et al. 2018

IET Information Security

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Section: Introductionmentioning

confidence: 99%

Thermal maps based HT detection using spatial projection transformation

Tang

Zhang³

et al. 2018

IET Information Security

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“…Timing measurements are also highly vulnerable to process variations. In [8], calibration of process variations with test structures have been performed. In this paper, a new process and experimental conditions variations resilient HT detection method based on path delay measurements is proposed.…”

Section: Introductionmentioning

confidence: 99%

Resilient hardware Trojans detection based on path delay measurements

Exurville

Zussa²,

Rigaud

et al. 2015

2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

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International audienceA Hardware Trojan is a malicious hardware modification of an integrated circuit. It could be inserted at different design steps but also during the process fabrication of the target. Due to the damages that can be caused, detection of these alterations has become a major concern. In this paper, we propose a new resilient method to detect Hardware Trojan based on path delay measurements. First, an accurate path delay model is defined. Then, path delay measurements are compared in a way that theoretically eliminate process and experimental variations effects. Finally, this proposed detection method is experimentally validated using different FPGA boards with substantial process variations. Both small sized sequential and combinatorial Hardware Trojans are implemented and successfully detected

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“…Among all side-channel analysis to detect minute variations in design parameters, path delay based IC fingerprinting [1], subject to pessimistic manufacturing variations, has become a popular direction to detect HT. Several works studied how to improve the resolution of path-based timing analysis with additional test structure [2][3][4]. On the contrary, switching activity analysis of the internal nets provides a non-invasive technique to investigate the possible HT in a design.…”

mentioning

confidence: 99%

Graph‐based approach towards hardware Trojan vulnerability analysis

Islam

2020

Electron. lett.

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The author proposes an incremental windowing technique based on graph technique to detect hardware Trojan triggering signal. First, they analyse the switching activity file generated during simulation. Then, based on the window size of choice, they extract paths of n-HT (n-hardware Trojan; n is the number of triggering signals) and compare the path information with the HT instances from HT database to determine HTs' earliest/farthest activation time. They experiment with the incremental windowing technique on 420 combinational HT instances for four combinational designs. The results indicate that small and stealthy HT is active for a limited set of the time window and the number of test patterns during these windows is compact instead of exhaustive traditional random vector based Automatic Test Pattern Generation (ATPG).

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Efficient Trojan Detection via Calibration of Process Variations

Cited by 32 publications

References 12 publications

Thermal maps based HT detection using spatial projection transformation

Thermal maps based HT detection using spatial projection transformation

Resilient hardware Trojans detection based on path delay measurements

Graph‐based approach towards hardware Trojan vulnerability analysis

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