Electrical and physical characterization of deuterium sinter on submicron devices

Mogul, H. C.; Liang, Cong; Wallace, Robert M.; Chen, P. J.; Rost, T.A.; Harvey, K. B.

doi:10.1063/1.121163

Cited by 31 publications

(16 citation statements)

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“…This observation is consistent with the repassivation of the interfacial dangling bonds Si• with deuterium ͑as Si-D͒. 4,9,11,12 This provides direct evidence that deuterium diffusion through planar poly-Si/SiO 2 structure can readily take place under the sintering conditions employed here, allowing efficient delivery of deuterium to the poly-Si/SiO 2 /Si interfacial region. [11][12][13] From the positive secondary ion SIMS data, the quantified Si-D areal density values in the gate SiO 2 -Si interface region are observed to be 2ϫ10 12 /cm 2 for NMOS and 1 ϫ10 13 /cm 2 for PMOS.…”

Section: A Deuterium Transport Through Poly-si Transistor Gate Stacksupporting

confidence: 81%

“…7 The secondary negative ion yield enhancement effect by Cs and the simultaneous suppression of molecular ion formation combine to provide significantly improved detection sensitivity for deuterium, at ϳ10 15 /cm 3 ͑by two orders-of-magnitude over the positive ion mode͒ compared to our previous work. 4 The drawback, however, is a ͑well-documented͒ complex behav-a͒ Present address: Materials Science Department, University of North Texas, Denton, Texas 76203-5310. Electronic mail: rwallace@unt.edu ior of negative secondary ion yield change across the Si/SiO 2 interface region, making accurate quantification of interfacial hydrogen/deuterium concentration difficult.…”

Section: Methodsmentioning

confidence: 99%

“…1 Additionally, reports have shown that n-type MOS ͑NMOS͒ channel hot carrier ͑CHC͒ lifetime can be markedly improved ͑10-50ϫ͒ by low temperature ͑400-450°C͒, post metallization ͑metal-1͒ sinter in molecular deuterium (D 2 ). [2][3][4][5] More recently, effects of D 2 sintering of multilevel metal structures with the associated interlevel dielectrics have also been reported. 6 In these processes, the efficient transport and delivery of such hydrogenous species to the SiO 2 /Si interface is important to obtain the desired improvement.…”

Section: Introductionmentioning

confidence: 99%

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Deuterium transport through device structures

Chen

Wallace

1999

Journal of Applied Physics

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We use secondary ion mass spectrometry to characterize the hydrogen/deuterium distribution and concentration on complimentary ''metal'' oxide silicon ͑CMOS͒ test structures subjected to molecular deuterium ͑D 2 ) anneals. We examine the temperature dependence and the influence of doping on the transport of deuterium to the gate oxide interfaces resulting in interface passivation. We find that undoped polycrystalline silicon appears to be an efficient barrier for deuterium transport at typical postmetallization sintering temperatures. We also examine the permeability of device structures that include dielectric encapsulation layers after typical postmetal sintering conditions employed in a conventional CMOS process flow. It is found that typical low temperature deposited oxide dielectrics are quite permeable by molecular deuterium at typical sintering temperatures ͑435°C͒. In contrast, chemical vapor deposited silicon nitride dielectrics appear to form a complete barrier to deuterium diffusion ͑even for layers as thin as 300 Å͒. We also find that nitrides which receive a high thermal budget exposure, such as the source/drain anneal, appears to regain permeability to deuterium diffusion/transport.

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Section: A Deuterium Transport Through Poly-si Transistor Gate Stacksupporting

confidence: 81%

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Deuterium transport through device structures

Chen

Wallace

1999

Journal of Applied Physics

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“…Since the chemistry of deuterium and hydrogen is identical deuterium was equally effective in passivating the Si-SiO 2 interface. This development followed a new wave of interests in deuterium for the SiSiO 2 system (19)(20)(21)(22). Integration of deuterium annealing into mainstream semiconductor manufacturing faced some technical challenges (23)(24).…”

Section: Deuterium At Si-sio 2 Interfacementioning

confidence: 99%

(DS&T Thomas D. Callinan Award Presentation) Role of Hydrogen in Dielectrics for Electronics and Optoelectronics Devices

Misra

2013

ECS Trans.

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In silicon-based electronic and optoelectronic devices hydrogen plays a significant role in passivating silicon dangling bonds. This improves the device performance and reliability of the devices by producing a high quality Si-SiO 2 interface. This work reviews the early use of hydrogen in standard silicon MOS devices with SiO 2 as gate dielectric to recent devices with high-k gate stacks. Role of hydrogen's isotope deuterium is outlined. In addition, the impact of hydrogen in high-k gate dielectrics on silicon and germanium substrates is also discussed. Contribution of hydrogen/deuterium in photodiode performance is also briefly described.

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“…Annealing in deuterium ambient is one of the methods used to incorporate deuterium at the Si/SiO 2 interface. [5][6][7] The challenge is to retain the implanted deuterium at the Si/SiO 2 interface until the CMOS fabrication process is completed. Alternate approaches like growing gate oxide in D 2 O ambient, 8 or incorporation of deuterium by pyrogenic oxidation 9 have yielded significant interface passivation because of higher deuterium retention.…”

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confidence: 99%

Si-SiO[sub 2] Interface Passivation Using Hydrogen and Deuterium Implantation

Kundu

Misra

2005

Electrochem. Solid-State Lett.

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Hydrogen/deuterium was implanted in ͗100͘ silicon to passivate dangling bonds at the Si/SiO 2 interface when a thin oxide is grown on implanted silicon substrate. It was observed that implantation energy and dose influence the interface passivation. Measured interface states at the Si/SiO 2 interface suggest an isotope effect where deuterium implanted devices yielded better interface passivation compared to that of hydrogen implanted devices. Diffusion of implanted hydrogen and deuterium to the interface is affected by the implantation damage.Recently deuterium has been used to passivate dangling bonds at the Si/SiO 2 interface 1 and Si/HfO 2 interface 2 after the hydrogen/ deuterium ͑H/D͒ isotope effect was discovered. 3 Deuterium passivation brings significant improvement in hot-carrier lifetime in metal oxide semiconductor ͑MOS͒ transistors. 3,4 This is because hot carrier stimulated deuterium desorption and depassivation of the silicon dangling bonds that generates interface trap states is substantially reduced as compared to hydrogen desorption. Annealing in deuterium ambient is one of the methods used to incorporate deuterium at the Si/SiO 2 interface. 5-7 The challenge is to retain the implanted deuterium at the Si/SiO 2 interface until the CMOS fabrication process is completed. Alternate approaches like growing gate oxide in D 2 O ambient, 8 or incorporation of deuterium by pyrogenic oxidation 9 have yielded significant interface passivation because of higher deuterium retention.Another approach is to incorporate deuterium by ion implantation. Harvey et al. have implanted deuterium to a partially completed device ͑before metalization͒ to incorporate deuterium at the Si/SiO 2 interface. 10,11 However, the impact of this was minimal and identical to deuterium annealing, as deuterium does not take part in oxide growth process. In addition, this process compromises the integrity of the gate oxide. In this work, we have used low energy ion implantation where hydrogen and deuterium were implanted in silicon substrate before the thin gate oxide is grown to incorporate hydrogen/deuterium at the Si/SiO 2 interface of a MOS device. Earlier work on deuterium implantation 12 and subsequent diffusion in single crystal silicon and in Si/SiO 2 system suggests that deuterium diffuses slowly in SiO 2 compared to crystalline silicon. Therefore, if gate oxide is grown after deuterium implantation strong interface passivation is possible. Deuterium implantation also provides a spatially uniform distribution of deuterium through out the channel. Preliminary work with low energy implant showed promising results. 13 Through electrical characterization this work demonstrated for the first time that an optimized implantation condition could effectively passivate the interface states due to deuterium retention at the interface. The measured interface states density D it in the order of 10 10 eV Ϫ1 cm Ϫ2 confirms the passivation by deuterium as it is identical to a typical forming gas anneal. Hydrogen was implanted to explore the p...

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Electrical and physical characterization of deuterium sinter on submicron devices

Cited by 31 publications

References 4 publications

Deuterium transport through device structures

Deuterium transport through device structures

(DS&T Thomas D. Callinan Award Presentation) Role of Hydrogen in Dielectrics for Electronics and Optoelectronics Devices

Si-SiO[sub 2] Interface Passivation Using Hydrogen and Deuterium Implantation

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