Electrical and structural properties of Au/Yb Schottky contact on p-type GaN as a function of the annealing temperature

Barrier height modification in Au/Ti/n-GaAs devices with a $$\hbox {HfO}_{2}$$ HfO 2 interfacial layer formed by atomic layer deposition

“…According to equation (8), the (n −1 −1) vs. (2kT) −1 plot should give a straight line with the slope and y-axis intercept related to the voltage coefficients ρ 2 and ρ 3 , respectively. The value of ρ 3 indicates that the distribution of the BH becomes more homogeneous Figure 15 presents the modified Richardson plots plotted from the experimental data of both diodes according to double GD in the temperature range of 60-400 K with steps of 10 K. Using equation (9) in equation (2), it can be rewritten as a modified Richardson expression as follows:…”

“…The current-voltage (I -V ) theory of MS rectifiers serves as the foundation of the physics of semiconductor devices. When an n-type semiconductor is brought into contact with a metal, the work function of the semiconductor should be less than that of the metal for the rectifying contact or Schottky barrier (SB) contact formation [1][2][3][4][5][6][7][8][9][10][11]. The MS contacts have been, in general, used as a gate in MESFETs and as drain and source in MOSFETs [1][2][3][4][5][6].…”

“…When an n-type semiconductor is brought into contact with a metal, the work function of the semiconductor should be less than that of the metal for the rectifying contact or Schottky barrier (SB) contact formation [1][2][3][4][5][6][7][8][9][10][11]. The MS contacts have been, in general, used as a gate in MESFETs and as drain and source in MOSFETs [1][2][3][4][5][6]. Generally, in metal-insulating layer-semiconductor (MIS) device fabrication, plasma etching may cause damage to the Schottky contact region, therefore an insulating or oxide layer deposition on the substrate surface represents an obstacle to damage [4][5][6][7][8][9].…”

“…The experimental forward bias I -V characteristics for the MIS structures with 3-and 5-nm HfO 2 interfacial layer thicknesses have been measured in the measurement temperature range of 60-400 K with steps of 10 K. To our knowledge, this study is the first experiment related to Au/Ti/n-GaAs structures with a HfO 2 interfacial layer over a wide measurement temperature in the literature so far. Group III-V semiconductors such as GaAs are more suitable for low-power and high-speed n-channel MOSFETs because they have higher electron mobility than Si MOSFETs [1][2][3][4][5][6][7][8][9]15,16].…”

“…The ALD technique allows conform and uniform film thickness with monolayer precision because this technique has submonolayer-by-submonolayer deposition mode characteristic [3][4][5]. The high-k oxides such as HfO 2 have high resistivity, high dielectric constants and large band gaps, therefore they can be used in optoelectronics and logic and memory devices, and have recently attracted much attention to replace SiO 2 in complementary MOS (CMOS) devices due to large band gap, conduction band offset and dielectric constant [1][2][3][4][5][6][7][8][9].…”