The suitability of the deep level transient spectroscopy (DLTS) technique in exploring locations with high and degraded carrier lifetimes containing grain-boundaries (GBs) in multicrystalline silicon (mc-Si) wafers was studied. The types and locations of GBs were determined in mc-Si samples by electron backscatter diffraction. Mesa-type Schottky diodes were prepared at (along) GBs and at reference, GB-free locations. Detected DLTS signals varied strongly along the same GB. Experiments with dislocation networks, model structures for GBs, showed that GB-related traps may be explored only using special arrangement of a GB and the diode contacts. Iron-related carrier traps were detected in locations with degraded carrier lifetimes. Densities of the traps for near-GB and for GB free locations were compared to the lifetime measurement results.