Electrical Investigation of Porous Silicon/p-Si Heterojunction Prepared by Electrochemical Etching

Abstract

We presented the conduction mechanism investigation of porous silicon/p-Si heterojunction fabricated on low resistivity crystalline silicon by electrochemical anodization. Measurements of the current – voltage I(V) and capacitance – voltage C(V) characteristics were used for the study of the electrical properties of this heterojunction. A deeper understanding of the physical mechanisms involved in the Au/porous silicon contacts and porous silicon/p-Si interface can be obtained from the voltage dependence of the fitting parameters according to electrical model circuits in DC and AC. We found in the heterojunction important conduction mechanisms: the resonant tunnelling, SCLC and the dielectric relaxation due to the pores layers at high frequencies.

Electrical Characterization of MIS Schottky Barrier Diodes Based on Nanostructured Porous Silicon and Silver Nanoparticles with Applications in Solar Cells

“…Due to the very different active layer for each device, the electrical RC parameters are rather dissimilar. It is observed that for the three active layer/TiO 2 interfaces, the electrical conduction of the Al/Si+nanoPS/TiO 2 /NiCr devices is lower than that of the Al/Si/TiO 2 /NiCr devices, most likely due to the formation of the nanopores in the heavily-doped regions of the Si substrate, leading to an effective reduction of the doping concentration [29]. The experimental results also show that the electrical conduction is notably increased in the devices based on nanoPS combined with metallic Ag nanoparticles.…”

“…It must be pointed out that for the Al/Si+nanoPS/TiO 2 /NiCr Schottky barrier diodes, the active layer is just represented by one semicircle, given that we assume that there are no rectifying interfaces between Si and nanoPS. In this regard, we consider that this is a heterostructure formed between two p-type semiconductors with different bandgaps, the bandgap of nanoPS being larger than that of Si [28,29]. It is also important to notice that electrical conduction through nanoPS is much lower than through Si, which is attributed to their very different conductivities [30,31].…”

AC Impedance Studies on Metal/Nanoporous Silicon/p-Silicon Structures

“…However, Au/PS/p-Si/ Al may be treated as a heterojunction and the physical mechanisms at the Au/PS and PS/p-Si contacts need to be carefully considered for the interpretation of dielectric relaxation. 24,25 As shown in Fig. 5b, this behavior may be explained in terms of an equivalent circuit comprising two parallel resistance-capacitance networks in series combination.…”

Temperature-Dependent and Dielectric Relaxation of Porous Silicon Prepared by Electrochemical Etching

“…Since the first work by Koshida et al [1] there have been published several papers dedicated to the DC and AC electrical characterization of porous silicon layers [2][3][4]. The electrical properties of these devices are strongly dependent not only on the properties of porous silicon, also on the quality of the metal/PS or PS/Si interfaces [5][6][7]. AC impedance analysis is a powerful tool and has been widely used to analyze the electrical performance of both metal-semiconductor junctions and p-n junctions [1,5].…”

“…AC impedance analysis is a powerful tool and has been widely used to analyze the electrical performance of both metal-semiconductor junctions and p-n junctions [1,5]. The analysis of the frequency-capacitance-voltage characteristics present in an ideal abrupt junction has to be studied to understand the three capacitances effects in the heterojunction PS/c-Si as Low-Frequency Dispersion phenomenon (LFD), depletion capacitance (C dep ) and geometric capacitance (C 0 ) [7]. An important aspect in these structures is the electrical contacts analysis on the PS layer and what is the dependence behavior when the voltage and temperature is variable [4].…”