Electrical Performances of NFinFET and PFinFET Transistors Correlating Processing Conditions and Scales of the Fin Structure

Yang, Hsin-Chia; Chen, Rui-Sheng; Yang, Ya Yuan; Tseng, Chun-Kai; Tsai, Chen-Han; Tseng, Jian-Jia; Chi, Sung-Ching; Liao, Yu-Jung

doi:10.1109/icice49024.2019.9117359

Cited by 2 publications

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“…However, the electrical performances, mainly manifested in current-versus-voltage characteristic curves (I-V curves), are thus put to be parameter-extracted in the model, which takes advantage of sophisticated equivalent circuits for academic and industrial uses. Nevertheless, the measured I-V curves are speculated to be also fitted by the "modified" conventional formula [13][14][15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

Yang

Chi

2022

Applied Sciences

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NFinFET transistors with various fin widths (110 nm, 115 nm, and 120 nm) are put into measurements, and the data are collected. By using the modified model, the measure data is fitted. Several parameters in the formula of modified model are determined to make both the measured data and the fitting data almost as close as possible. Those parameters are listed and analyzed, including kN (proportional to channel width and gate oxide capacitor, and inversely proportional to the channel length) λ (the inverse of Early Voltage), and sometimes Vth (Threshold Voltage). By kN, the appropriate process control can be high lighted, the corresponding channel concentration can be calculated and thus many implicit physical quantities may be exploited.

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Section: Introductionmentioning

confidence: 99%

Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

Yang

Chi

2022

Applied Sciences

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Comparison of Fitting Current–Voltage Characteristics Curves of FinFET Transistors with Various Fixed Parameters

2022

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In the deep submicron regime, FinFET successfully suppresses the leakage current using a 3D fin-like channel substrate, which gets depleted and blocks possible leakage as the gate is applied with a bias wholly wrapping the channel. Fortunately, a scanning photo-lithography using extensive ultraviolet (EUV) and multi-mask task carefully resolves critical dimension issues. The ensuing anisotropic plasma dry etching is somehow a subsequent challenging process, which consumes the edge of original ‘I’-shape epitaxial silicon and causes dimension loss, and thus produces fin-like bodies as prepared channels. In order to protect the transistors from malfunction due to dimension over-etching, fin width is taken to be 120 nanometers, while the channel lengths vary. The prepared transistors are measured and characteristic curves are fitted for analysis. Measured current versus voltage characteristic curves are fitted with three parameters (transistor geometry constant, threshold voltage, and Early voltage) in the conventional current-voltage formula , which are allowed to vary as the short channel effects or process-related issues are taken into account. In this paper, one of the three is deliberately set to be fixed for a transistor, and the others are freely chosen and determined to reach minimum variation. Various conclusions through comparisons and analysis may give important feasible applications in the future.

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Electrical Performances of NFinFET and PFinFET Transistors Correlating Processing Conditions and Scales of the Fin Structure

Cited by 2 publications

References 1 publication

Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

Process Corresponding Implications Associated with a Conclusive Model-Fit Current-Voltage Characteristic Curves

Comparison of Fitting Current–Voltage Characteristics Curves of FinFET Transistors with Various Fixed Parameters

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