2010
DOI: 10.1143/jjap.49.04df08
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Electrical Properties of Metal–Insulator–Semiconductor Capacitors on Freestanding GaN Substrate

Abstract: The electrical properties of GaN metal–insulator–semiconductor (MIS) capacitors with as-grown SiO2, annealed SiO2, and SiN x insulators were investigated by capacitance–voltage (C–V), current–voltage (I–V), and time-dependent dielectric breakdown (TDDB) measurements. The MIS capacitor with the SiN x insulator was determined to have a lower interface trap density of 1×1011 cm-2 eV-1 than the MIS capacitors with the as-grown and anne… Show more

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Cited by 30 publications
(18 citation statements)
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“…Since the plot of log ( J / E 2 ) versus 1/ E is linear, as shown in Figure 7(a), the oxide conduction is FN conduction. The barrier height extracted from the FN plot as shown in Figure 7(a) is 2.9 eV, and this value is found to be consistent with the previously reported values for the SiO 2 /GaN interface [28,29]. …”
Section: Resultssupporting
confidence: 90%
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“…Since the plot of log ( J / E 2 ) versus 1/ E is linear, as shown in Figure 7(a), the oxide conduction is FN conduction. The barrier height extracted from the FN plot as shown in Figure 7(a) is 2.9 eV, and this value is found to be consistent with the previously reported values for the SiO 2 /GaN interface [28,29]. …”
Section: Resultssupporting
confidence: 90%
“…Figure 7(c) shows a linear relation, suggesting that the dielectric conduction is Pool–Frenkel emission. The Si x N y dielectric is well known for showing Pool–Frenkel emission [28,31,32], consistent with the result shown in Figure 7(c). The Pool–Frenkel emission is due to emission of trapped electrons into the conduction band.…”
Section: Resultssupporting
confidence: 87%
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“…2͑a͒, the oxide conduction is FN conduction. 16,17 On the other hand, for MIS Pt-GaN diodes with a SiO 2 dielectric, the measured I-V data in a H 2 ambient were fitted using the Pool-Frenkel emission model, as shown in Fig. 2͑a͒ is 2.9 eV, and this value is found to be consistent with the previously reported values for the SiO 2 / GaN interface.…”
Section: Resultssupporting
confidence: 83%
“…Judging from the energy bandgap and conduction band offset between the insulators and the GaN-related materials, alumina (Al 2 O 3 ), SiO 2 , and their nitrides seem to be possible candidates for gate dielectrics. [1][2][3][4][5][6][7][8][9][10][11][12][13][14] Since the atomic layer deposition (ALD) technique for producing high-quality Al 2 O 3 was established, ALD-Al 2 O 3 films have been widely used for GaN-based MOS devices. 4,6,7,[10][11][12] However, regardless of the film deposition technique used, Al 2 O 3 involves an essential problem of electron trapping, 6,13,14) thus leading to significant I d -V g hysteresis and V th instability (positive V th shift).…”
mentioning
confidence: 99%